Lines Matching refs:IWM_DPRINTF

630 				IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV,
813 IWM_DPRINTF(sc, IWM_DEBUG_FIRMWARE_TLV,
1395 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
1549 IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
1585 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
1681 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: enabled txq %d FIFO %d\n",
1824 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
1830 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
1897 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
1905 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
2050 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM,
2064 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM,
2135 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
2399 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM, "Read from NVM\n");
2428 IWM_DPRINTF(sc, IWM_DEBUG_EEPROM | IWM_DEBUG_RESET,
2449 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
2570 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
2632 IWM_DPRINTF(sc, IWM_DEBUG_RESET,
2655 IWM_DPRINTF(sc, IWM_DEBUG_RESET, "working with %s CPU\n",
2694 IWM_DPRINTF(sc, IWM_DEBUG_RESET, "working with %s CPU\n",
2720 IWM_DPRINTF(sc, IWM_DEBUG_INTR, "Enabling FW load interrupt\n");
2808 IWM_DPRINTF(sc, IWM_DEBUG_CMD | IWM_DEBUG_RESET,
2849 IWM_DPRINTF(sc, IWM_DEBUG_FW,
2854 IWM_DPRINTF(sc, IWM_DEBUG_FW, "Alive ucode CDB\n");
2856 IWM_DPRINTF(sc, IWM_DEBUG_FW,
3142 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "received PHY stats\n");
3159 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "%s: i=%d, noise=%d\n",
3170 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "%s: nbant=%d, total=%d\n",
3217 IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3272 IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3292 IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3295 IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3375 IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3409 IWM_DPRINTF(sc, IWM_DEBUG_RECV,
3490 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "input m %p\n", m);
3494 IWM_DPRINTF(sc, IWM_DEBUG_RECV, "inputall m %p\n", m);
3520 IWM_DPRINTF(sc, IWM_DEBUG_XMIT, "%s: status=0x%04x, seq=%d, fc=%d, btc=%d, frts=%d, ff=%d, irate=%08x, wmt=%d\n",
3537 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
3612 IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
3648 IWM_DPRINTF(sc, IWM_DEBUG_CMD,
3719 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE,
3750 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
3754 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
3758 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
3762 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: DATA\n", __func__);
3772 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TXRATE,
3778 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE, "%s: ridx=%d; rate=%d, CCK=%d\n",
3952 IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
3956 IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
4016 IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
4021 IWM_DPRINTF(sc, IWM_DEBUG_XMIT,
4168 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_STATE,
4173 IWM_DPRINTF(sc, IWM_DEBUG_STATE, "%s: Current node bssid: %s\n",
4360 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
4407 IWM_DPRINTF(sc, IWM_DEBUG_TXRATE,
4523 IWM_DPRINTF(sc, IWM_DEBUG_STATE,
4651 IWM_DPRINTF(sc, IWM_DEBUG_SCAN | IWM_DEBUG_TRACE,
4716 IWM_DPRINTF(sc, IWM_DEBUG_LAR, "%s: no LAR support\n",
4733 IWM_DPRINTF(sc, IWM_DEBUG_LAR,
4759 IWM_DPRINTF(sc, IWM_DEBUG_LAR,
4985 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "->%s\n", __func__);
5001 IWM_DPRINTF(sc, IWM_DEBUG_XMIT | IWM_DEBUG_TRACE, "<-%s\n", __func__);
5374 IWM_DPRINTF(sc, IWM_DEBUG_INTR,
5442 IWM_DPRINTF(sc, IWM_DEBUG_BEACON | IWM_DEBUG_STATE,
5499 IWM_DPRINTF(sc, IWM_DEBUG_LAR,
5516 IWM_DPRINTF(sc, IWM_DEBUG_TEMP,
5587 IWM_DPRINTF(sc, IWM_DEBUG_SCAN, "UMAC scan iteration "
5622 IWM_DPRINTF(sc, IWM_DEBUG_CMD,
5695 IWM_DPRINTF(sc, IWM_DEBUG_INTR,
5852 IWM_DPRINTF(sc, IWM_DEBUG_INTR,
6228 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
6306 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
6359 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
6377 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,
6384 IWM_DPRINTF(sc, IWM_DEBUG_RESET | IWM_DEBUG_TRACE,