Lines Matching refs:interrupt_status
2631 * @param[in] interrupt_status
2641 U32 interrupt_status
2650 this_controller, interrupt_status
2654 (interrupt_status & SMU_ISR_QUEUE_ERROR)
2656 (interrupt_status & SMU_ISR_QUEUE_SUSPEND)
2693 U32 interrupt_status;
2710 interrupt_status = SMU_ISR_READ(this_controller);
2711 if ((interrupt_status &
2720 controller, interrupt_status
2798 U32 interrupt_status;
2802 interrupt_status = SMU_ISR_READ(this_controller);
2804 this_controller, interrupt_status
2883 U32 interrupt_status;
2893 interrupt_status = SMU_ISR_READ(this_controller);
2894 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
2897 (interrupt_status == 0)
2909 if (interrupt_status != 0)
2935 U32 interrupt_status;
2946 interrupt_status = SMU_ISR_READ(this_controller);
2947 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
2949 if (interrupt_status & SMU_ISR_QUEUE_ERROR)
2967 (interrupt_status & SMU_ISR_QUEUE_SUSPEND)
3090 U32 interrupt_status;
3095 interrupt_status = SMU_ISR_READ(this_controller);
3096 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
3098 if (interrupt_status != 0)
3127 U32 interrupt_status;
3138 interrupt_status = SMU_ISR_READ(this_controller);
3141 (interrupt_status & SMU_ISR_QUEUE_SUSPEND)
3155 interrupt_status