Lines Matching refs:SMU_ISR_QUEUE_SUSPEND
2656 (interrupt_status & SMU_ISR_QUEUE_SUSPEND)
2714 SMU_ISR_QUEUE_SUSPEND)) == 0)
2778 (U32)(SMU_ISR_COMPLETION | SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)
2894 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
2947 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
2967 (interrupt_status & SMU_ISR_QUEUE_SUSPEND)
2994 (SMU_ISR_COMPLETION | SMU_ISR_QUEUE_SUSPEND)
3096 interrupt_status &= (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND);
3109 // Could we write the value of (SMU_ISR_QUEUE_ERROR | SMU_ISR_QUEUE_SUSPEND)?
3141 (interrupt_status & SMU_ISR_QUEUE_SUSPEND)
3147 SMU_ISR_WRITE(this_controller, SMU_ISR_QUEUE_SUSPEND);