Lines Matching refs:PMC_E500_COMMON
67 #define PMC_E500_COMMON(id, number) \
71 PMC_E500_COMMON(CYCLES, 1),
72 PMC_E500_COMMON(INSTR_COMPLETED, 2),
73 PMC_E500_COMMON(UOPS_COMPLETED, 3),
74 PMC_E500_COMMON(INSTR_FETCHED, 4),
75 PMC_E500_COMMON(UOPS_DECODED, 5),
76 PMC_E500_COMMON(PM_EVENT_TRANSITIONS, 6),
77 PMC_E500_COMMON(PM_EVENT_CYCLES, 7),
78 PMC_E500_COMMON(BRANCH_INSTRS_COMPLETED, 8),
79 PMC_E500_COMMON(LOAD_UOPS_COMPLETED, 9),
80 PMC_E500_COMMON(STORE_UOPS_COMPLETED, 10),
81 PMC_E500_COMMON(CQ_REDIRECTS, 11),
82 PMC_E500_COMMON(BRANCHES_FINISHED, 12),
83 PMC_E500_COMMON(TAKEN_BRANCHES_FINISHED, 13),
84 PMC_E500_COMMON(FINISHED_UNCOND_BRANCHES_MISS_BTB, 14),
85 PMC_E500_COMMON(BRANCH_MISPRED, 15),
86 PMC_E500_COMMON(BTB_BRANCH_MISPRED_FROM_DIRECTION, 16),
87 PMC_E500_COMMON(BTB_HITS_PSEUDO_HITS, 17),
88 PMC_E500_COMMON(CYCLES_DECODE_STALLED, 18),
89 PMC_E500_COMMON(CYCLES_ISSUE_STALLED, 19),
90 PMC_E500_COMMON(CYCLES_BRANCH_ISSUE_STALLED, 20),
91 PMC_E500_COMMON(CYCLES_SU1_SCHED_STALLED, 21),
92 PMC_E500_COMMON(CYCLES_SU2_SCHED_STALLED, 22),
93 PMC_E500_COMMON(CYCLES_MU_SCHED_STALLED, 23),
94 PMC_E500_COMMON(CYCLES_LRU_SCHED_STALLED, 24),
95 PMC_E500_COMMON(CYCLES_BU_SCHED_STALLED, 25),
96 PMC_E500_COMMON(TOTAL_TRANSLATED, 26),
97 PMC_E500_COMMON(LOADS_TRANSLATED, 27),
98 PMC_E500_COMMON(STORES_TRANSLATED, 28),
99 PMC_E500_COMMON(TOUCHES_TRANSLATED, 29),
100 PMC_E500_COMMON(CACHEOPS_TRANSLATED, 30),
101 PMC_E500_COMMON(CACHE_INHIBITED_ACCESS_TRANSLATED, 31),
102 PMC_E500_COMMON(GUARDED_LOADS_TRANSLATED, 32),
103 PMC_E500_COMMON(WRITE_THROUGH_STORES_TRANSLATED, 33),
104 PMC_E500_COMMON(MISALIGNED_LOAD_STORE_ACCESS_TRANSLATED, 34),
105 PMC_E500_COMMON(TOTAL_ALLOCATED_TO_DLFB, 35),
106 PMC_E500_COMMON(LOADS_TRANSLATED_ALLOCATED_TO_DLFB, 36),
107 PMC_E500_COMMON(STORES_COMPLETED_ALLOCATED_TO_DLFB, 37),
108 PMC_E500_COMMON(TOUCHES_TRANSLATED_ALLOCATED_TO_DLFB, 38),
109 PMC_E500_COMMON(STORES_COMPLETED, 39),
110 PMC_E500_COMMON(DATA_L1_CACHE_LOCKS, 40),
111 PMC_E500_COMMON(DATA_L1_CACHE_RELOADS, 41),
112 PMC_E500_COMMON(DATA_L1_CACHE_CASTOUTS, 42),
113 PMC_E500_COMMON(LOAD_MISS_DLFB_FULL, 43),
114 PMC_E500_COMMON(LOAD_MISS_LDQ_FULL, 44),
115 PMC_E500_COMMON(LOAD_GUARDED_MISS, 45),
116 PMC_E500_COMMON(STORE_TRANSLATE_WHEN_QUEUE_FULL, 46),
117 PMC_E500_COMMON(ADDRESS_COLLISION, 47),
118 PMC_E500_COMMON(DATA_MMU_MISS, 48),
119 PMC_E500_COMMON(DATA_MMU_BUSY, 49),
120 PMC_E500_COMMON(PART2_MISALIGNED_CACHE_ACCESS, 50),
121 PMC_E500_COMMON(LOAD_MISS_DLFB_FULL_CYCLES, 51),
122 PMC_E500_COMMON(LOAD_MISS_LDQ_FULL_CYCLES, 52),
123 PMC_E500_COMMON(LOAD_GUARDED_MISS_CYCLES, 53),
124 PMC_E500_COMMON(STORE_TRANSLATE_WHEN_QUEUE_FULL_CYCLES, 54),
125 PMC_E500_COMMON(ADDRESS_COLLISION_CYCLES, 55),
126 PMC_E500_COMMON(DATA_MMU_MISS_CYCLES, 56),
127 PMC_E500_COMMON(DATA_MMU_BUSY_CYCLES, 57),
128 PMC_E500_COMMON(PART2_MISALIGNED_CACHE_ACCESS_CYCLES, 58),
129 PMC_E500_COMMON(INSTR_L1_CACHE_LOCKS, 59),
130 PMC_E500_COMMON(INSTR_L1_CACHE_RELOADS, 60),
131 PMC_E500_COMMON(INSTR_L1_CACHE_FETCHES, 61),
132 PMC_E500_COMMON(INSTR_MMU_TLB4K_RELOADS, 62),
133 PMC_E500_COMMON(INSTR_MMU_VSP_RELOADS, 63),
134 PMC_E500_COMMON(DATA_MMU_TLB4K_RELOADS, 64),
135 PMC_E500_COMMON(DATA_MMU_VSP_RELOADS, 65),
136 PMC_E500_COMMON(L2MMU_MISSES, 66),
137 PMC_E500_COMMON(BIU_MASTER_REQUESTS, 67),
138 PMC_E500_COMMON(BIU_MASTER_INSTR_SIDE_REQUESTS, 68),
139 PMC_E500_COMMON(BIU_MASTER_DATA_SIDE_REQUESTS, 69),
140 PMC_E500_COMMON(BIU_MASTER_DATA_SIDE_CASTOUT_REQUESTS, 70),
141 PMC_E500_COMMON(BIU_MASTER_RETRIES, 71),
142 PMC_E500_COMMON(SNOOP_REQUESTS, 72),
143 PMC_E500_COMMON(SNOOP_HITS, 73),
144 PMC_E500_COMMON(SNOOP_PUSHES, 74),
145 PMC_E500_COMMON(SNOOP_RETRIES, 75),
158 PMC_E500_COMMON(PMC0_OVERFLOW, 82),
159 PMC_E500_COMMON(PMC1_OVERFLOW, 83),
160 PMC_E500_COMMON(PMC2_OVERFLOW, 84),
161 PMC_E500_COMMON(PMC3_OVERFLOW, 85),
162 PMC_E500_COMMON(INTERRUPTS_TAKEN, 86),
163 PMC_E500_COMMON(EXT_INPUT_INTR_TAKEN, 87),
164 PMC_E500_COMMON(CRIT_INPUT_INTR_TAKEN, 88),
165 PMC_E500_COMMON(SYSCALL_TRAP_INTR, 89),