Lines Matching defs:init_def
78 struct gpioregulator_init_def init_def;
213 &sc->init_def.reg_init_def);
225 sc->init_def.nstates = len / 2;
226 sc->init_def.states = malloc(sc->init_def.nstates *
227 sizeof(*sc->init_def.states), M_DEVBUF, M_WAITOK);
228 for (n = 0; n < sc->init_def.nstates; n++) {
229 sc->init_def.states[n].val = pstates[n * 2 + 0];
230 sc->init_def.states[n].mask = pstates[n * 2 + 1];
231 mask |= sc->init_def.states[n].mask;
236 &sc->init_def.startup_delay_us,
237 sizeof(sc->init_def.startup_delay_us));
239 sc->init_def.startup_delay_us = 0;
243 &sc->init_def.enable_pin);
245 sc->init_def.enable_pin_valid = 1;
248 sc->init_def.npins = 32 - __builtin_clz(mask);
249 sc->init_def.pins = malloc(sc->init_def.npins *
250 sizeof(sc->init_def.pins), M_DEVBUF, M_WAITOK | M_ZERO);
251 for (n = 0; n < sc->init_def.npins; n++) {
253 &sc->init_def.pins[n]);
262 for (n = 0; n < sc->init_def.npins; n++) {
263 if (sc->init_def.pins[n] != NULL)
264 gpio_pin_release(sc->init_def.pins[n]);
267 free(sc->init_def.states, M_DEVBUF);
268 free(sc->init_def.pins, M_DEVBUF);
304 sc->init_def.reg_init_def.id = 1;
305 sc->init_def.reg_init_def.ofw_node = node;
308 &sc->init_def.reg_init_def);
318 sc->reg_sc->def = &sc->init_def;