Lines Matching defs:dmach
360 uint32_t *dmach = (uint32_t *) data;
390 if (*dmach <= OHCI_MAX_DMA_CH) {
391 dump_dma(fc, *dmach);
392 dump_db(fc, *dmach);
652 sc->arrq.xferq.dmach = -1;
653 sc->arrs.xferq.dmach = -1;
654 sc->atrq.xferq.dmach = -1;
655 sc->atrs.xferq.dmach = -1;
670 sc->it[i].xferq.dmach = i;
671 sc->ir[i].xferq.dmach = i;
1298 fwohci_itx_disable(struct firewire_comm *fc, int dmach)
1302 OWRITE(sc, OHCI_ITCTLCLR(dmach),
1304 OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach);
1305 OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach);
1308 fwohci_db_free(&sc->it[dmach]);
1309 sc->it[dmach].xferq.flag &= ~FWXFERQ_RUNNING;
1314 fwohci_irx_disable(struct firewire_comm *fc, int dmach)
1318 OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
1319 OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach);
1320 OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach);
1323 fwohci_db_free(&sc->ir[dmach]);
1324 sc->ir[dmach].xferq.flag &= ~FWXFERQ_RUNNING;
1341 int idb, z, i, dmach = 0, ldesc;
1351 for (dmach = 0; dmach < sc->fc.nisodma; dmach++) {
1352 if (&sc->it[dmach] == dbch) {
1353 off = OHCI_ITOFF(dmach);
1400 int idb, z, i, dmach = 0, ldesc;
1411 for (dmach = 0; dmach < sc->fc.nisodma; dmach++) {
1412 if (&sc->ir[dmach] == dbch) {
1413 off = OHCI_IROFF(dmach);
1503 fwohci_itxbuf_enable(struct firewire_comm *fc, int dmach)
1514 dbch = &sc->it[dmach];
1540 fwohci_txbufdb(sc, dmach, chunk);
1564 stat = OREAD(sc, OHCI_ITCTL(dmach));
1572 OWRITE(sc, OHCI_ITCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
1574 OWRITE(sc, OHCI_IT_MASKCLR, 1 << dmach);
1575 OWRITE(sc, OHCI_IT_STATCLR, 1 << dmach);
1576 OWRITE(sc, OHCI_IT_MASK, 1 << dmach);
1580 OWRITE(sc, OHCI_ITCMD(dmach),
1585 dump_dma(sc, ITX_CH + dmach);
1596 OWRITE(sc, OHCI_ITCTLCLR(dmach), 0xffff0000);
1602 OWRITE(sc, OHCI_ITCTL(dmach),
1606 OWRITE(sc, OHCI_ITCTL(dmach), OHCI_CNTL_DMA_RUN);
1611 dump_dma(sc, ITX_CH + dmach);
1612 dump_db(sc, ITX_CH + dmach);
1617 OWRITE(sc, OHCI_ITCTL(dmach), OHCI_CNTL_DMA_WAKE);
1624 fwohci_irx_enable(struct firewire_comm *fc, int dmach)
1635 dbch = &sc->ir[dmach];
1641 OWRITE(sc, OHCI_IRMATCH(dmach), tagbit[tag] | ich);
1696 stat = OREAD(sc, OHCI_IRCTL(dmach));
1700 OWRITE(sc, OHCI_IRCTLCLR(dmach), OHCI_CNTL_DMA_RUN);
1706 OWRITE(sc, OHCI_IR_MASKCLR, 1 << dmach);
1707 OWRITE(sc, OHCI_IR_STATCLR, 1 << dmach);
1708 OWRITE(sc, OHCI_IR_MASK, 1 << dmach);
1709 OWRITE(sc, OHCI_IRCTLCLR(dmach), 0xf0000000);
1710 OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_ISOHDR);
1711 OWRITE(sc, OHCI_IRCMD(dmach),
1714 OWRITE(sc, OHCI_IRCTL(dmach), OHCI_CNTL_DMA_RUN);
1717 dump_db(sc, IRX_CH + dmach);
2138 fwohci_tbuf_update(struct fwohci_softc *sc, int dmach)
2147 it = fc->it[dmach];
2148 ldesc = sc->it[dmach].ndesc - 1;
2151 fwdma_sync_multiseg_all(sc->it[dmach].am, BUS_DMASYNC_POSTREAD);
2153 dump_db(sc, ITX_CH + dmach);
2186 fwohci_rbuf_update(struct fwohci_softc *sc, int dmach)
2195 ir = fc->ir[dmach];
2196 ldesc = sc->ir[dmach].ndesc - 1;
2199 dump_db(sc, dmach);
2203 fwdma_sync_multiseg_all(sc->ir[dmach].am, BUS_DMASYNC_POSTREAD);
2212 bus_dmamap_sync(sc->ir[dmach].dmat, db_tr->dma_map,
2214 bus_dmamap_unload(sc->ir[dmach].dmat, db_tr->dma_map);
2490 fwohci_txbufdb(struct fwohci_softc *sc, int dmach, struct fw_bulkxfer *bulkxfer)
2502 dbch = &sc->it[dmach];
2503 chtag = sc->it[dmach].xferq.flag & 0xff;