Lines Matching refs:_p
216 #define AR8X16_CPU_MIRROR_PORT(_p) ((_p) << AR8X16_MIRROR_PORT_SHIFT)
243 #define AR8X16_REG_PORT_BASE(_p) (0x0100 + (_p) * 0x0100)
245 #define AR8X16_REG_PORT_STS(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0000)
259 #define AR8X16_REG_PORT_CTRL(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0004)
281 #define AR8X16_REG_PORT_VLAN(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0008)
292 #define AR8X16_REG_PORT_RATE_LIM(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x000c)
310 #define AR8X16_REG_PORT_PRIORITY(_p) (AR8X16_REG_PORT_BASE((_p)) + 0x0010)
312 #define AR8X16_REG_STATS_BASE(_p) (0x20000 + (_p) * 0x100)
380 #define AR934X_FLOOD_MASK_UC_DP(_p) (1 << (0 + (_p)))
381 #define AR934X_FLOOD_MASK_MC_DP(_p) (1 << (16 + (_p)))
382 #define AR934X_FLOOD_MASK_BC_DP(_p) (1 << (25 + (_p)))