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  • only in /freebsd-13-stable/sys/dev/e1000/

Lines Matching refs:PHY_REG

136 #define PHY_REG(page, reg)	(((page) << PHY_PAGE_SHIFT) | \
138 #define IGP3_KMRN_DIAG PHY_REG(770, 19) /* KMRN Diagnostic */
139 #define IGP3_VR_CTRL PHY_REG(776, 18) /* Voltage Regulator Control */
146 #define BM_PORT_GEN_CFG PHY_REG(BM_PORT_CTRL_PAGE, 17)
147 #define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
148 #define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
149 #define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
150 #define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
165 #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */
166 #define HV_MUX_DATA_CTRL PHY_REG(776, 16)
171 #define HV_SCC_UPPER PHY_REG(HV_STATS_PAGE, 16) /* Single Collision */
172 #define HV_SCC_LOWER PHY_REG(HV_STATS_PAGE, 17)
173 #define HV_ECOL_UPPER PHY_REG(HV_STATS_PAGE, 18) /* Excessive Coll. */
174 #define HV_ECOL_LOWER PHY_REG(HV_STATS_PAGE, 19)
175 #define HV_MCC_UPPER PHY_REG(HV_STATS_PAGE, 20) /* Multiple Collision */
176 #define HV_MCC_LOWER PHY_REG(HV_STATS_PAGE, 21)
177 #define HV_LATECOL_UPPER PHY_REG(HV_STATS_PAGE, 23) /* Late Collision */
178 #define HV_LATECOL_LOWER PHY_REG(HV_STATS_PAGE, 24)
179 #define HV_COLC_UPPER PHY_REG(HV_STATS_PAGE, 25) /* Collision */
180 #define HV_COLC_LOWER PHY_REG(HV_STATS_PAGE, 26)
181 #define HV_DC_UPPER PHY_REG(HV_STATS_PAGE, 27) /* Defer Count */
182 #define HV_DC_LOWER PHY_REG(HV_STATS_PAGE, 28)
183 #define HV_TNCRS_UPPER PHY_REG(HV_STATS_PAGE, 29) /* Tx with no CRS */
184 #define HV_TNCRS_LOWER PHY_REG(HV_STATS_PAGE, 30)
194 #define CV_SMB_CTRL PHY_REG(769, 23)
198 #define I218_ULP_CONFIG1 PHY_REG(779, 16)
212 #define HV_SMB_ADDR PHY_REG(768, 26)
228 #define HV_OEM_BITS PHY_REG(768, 25)
234 #define HV_KMRN_MODE_CTRL PHY_REG(769, 16)
238 #define HV_KMRN_FIFO_CTRLSTA PHY_REG(770, 16)
243 #define HV_PM_CTRL PHY_REG(770, 17)
247 #define I217_PLL_CLOCK_GATE_REG PHY_REG(772, 28)
253 #define I217_INBAND_CTRL PHY_REG(770, 18)
258 #define I217_LPI_GPIO_CTRL PHY_REG(772, 18)
262 #define I82579_LPI_CTRL PHY_REG(772, 20)
268 #define I82579_DFT_CTRL PHY_REG(769, 20)
299 #define I217_SxCTRL PHY_REG(BM_PORT_CTRL_PAGE, 28)
301 #define I217_CGFREG PHY_REG(772, 29)
303 #define I217_MEMPWR PHY_REG(772, 26)