Lines Matching defs:mac
1238 /* Reapply mac settings if they were lost due to a reset */
1304 struct cmac *mac = &p->mac;
1317 t3_mac_set_mtu(mac, mtu);
1319 t3_mac_set_address(mac, 0, p->hw_addr);
1321 t3_mac_set_rx_mode(mac, &rm);
1689 struct cmac *mac = &p->mac;
1729 if (!mac->multiport)
1730 t3_mac_init(mac);
1732 t3_link_start(&p->phy, mac, &p->link_config);
1733 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
1834 t3_set_reg_field(sc, A_XGM_TX_CFG + pi->mac.offset, F_TXPAUSEEN, 0);
1837 t3_set_reg_field(sc, A_XGM_RXFIFO_CFG + pi->mac.offset,
1843 t3_wait_op_done(sc, A_XGM_TXFIFO_CFG + pi->mac.offset,
1847 t3_mac_disable(&pi->mac, MAC_DIRECTION_RX);
2213 struct cmac *mac = &pi->mac;
2214 struct mac_stats *mstats = &mac->stats;
2346 status = t3b2_mac_watchdog_task(&p->mac);
2348 p->mac.stats.num_toggled++;
2350 struct cmac *mac = &p->mac;
2353 t3_link_start(&p->phy, mac, &p->link_config);
2354 t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX);
2356 p->mac.stats.num_resets++;
2386 t3_mac_update_stats(&pi->mac);
2435 struct cmac *mac = &pi->mac;
2442 if (mac->multiport)
2446 cause = t3_read_reg(sc, A_XGM_INT_CAUSE + mac->offset);
2449 mac->stats.rx_fifo_ovfl++;
2452 t3_write_reg(sc, A_XGM_INT_CAUSE + mac->offset, reset);
3001 t3_mac_update_stats(&pi->mac);
3002 memset(&pi->mac.stats, 0, sizeof(pi->mac.stats));
3225 * periodic mac stats accumulation. Hard to justify the complexity.