Lines Matching refs:BWI_MAC_STATUS
322 CSR_WRITE_4(sc, BWI_MAC_STATUS,
481 status = CSR_READ_4(sc, BWI_MAC_STATUS);
487 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
571 val = CSR_READ_4(sc, BWI_MAC_STATUS);
720 CSR_READ_4(sc, BWI_MAC_STATUS); /* dummy read */
1046 CSR_WRITE_4(sc, BWI_MAC_STATUS,
1092 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_GPOSEL_MASK);
1244 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1245 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_INFRA);
1254 mac_status = CSR_READ_4(sc, BWI_MAC_STATUS);
1292 CSR_WRITE_4(sc, BWI_MAC_STATUS, mac_status);
1447 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1451 CSR_READ_4(sc, BWI_MAC_STATUS);
1467 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_ENABLE);
1470 CSR_READ_4(sc, BWI_MAC_STATUS);
1493 status = CSR_READ_4(sc, BWI_MAC_STATUS);
1497 CSR_WRITE_4(sc, BWI_MAC_STATUS, status);
1500 CSR_READ_4(sc, BWI_MAC_STATUS);
1565 val = CSR_READ_4(sc, BWI_MAC_STATUS);
1931 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1934 CSR_READ_4(sc, BWI_MAC_STATUS);
1951 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_RFLOCK);
1970 CSR_SETBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);
1972 CSR_CLRBITS_4(sc, BWI_MAC_STATUS, BWI_MAC_STATUS_PROMISC);