Lines Matching refs:uint16_t
168 uint16_t channelValue;
169 uint16_t pcdacMin;
170 uint16_t pcdacMax;
171 uint16_t numPcdacValues;
172 uint16_t PcdacValues[64];
178 uint16_t channelValue;
179 uint16_t pcdacMin;
180 uint16_t pcdacMax;
181 uint16_t numPcdacValues;
182 uint16_t PcdacValues[NUM_PCDAC_VALUES];
189 const uint16_t *pChannelList;
190 uint16_t numChannels;
195 uint16_t twicePwr54;
196 uint16_t twicePwr48;
197 uint16_t twicePwr36;
198 uint16_t twicePwr6_24;
199 uint16_t testChannel;
203 uint16_t numTargetPwr_11a;
205 uint16_t numTargetPwr_11g;
207 uint16_t numTargetPwr_11b;
212 uint16_t gSel;
213 uint16_t pd84;
214 uint16_t pd90;
215 uint16_t clip;
235 uint16_t xpd_gain;
236 uint16_t numPcdacs;
237 uint16_t pcdac[NUM_POINTS_XPD0];
242 uint16_t channelValue;
248 uint16_t *pChannels;
249 uint16_t numChannels;
250 uint16_t xpdMask; /* mask of permitted xpd_gains */
255 uint16_t channelValue;
256 uint16_t pcd1_xg0;
258 uint16_t pcd2_delta_xg0;
260 uint16_t pcd3_delta_xg0;
262 uint16_t pcd4_delta_xg0;
272 uint16_t pChannels[NUM_11A_EEPROM_CHANNELS];
273 uint16_t numChannels;
274 uint16_t xpdMask; /* mask of permitted xpd_gains */
296 uint16_t pd_gain;
297 uint16_t numVpd;
298 uint16_t Vpd[NUM_POINTS_LAST_PDGAIN];
303 uint16_t channelValue;
305 uint16_t numPdGains; /* # Pd Gains per channel */
311 uint16_t pChannels[NUM_11A_EEPROM_CHANNELS_2413];
312 uint16_t numChannels;
313 uint16_t xpd_mask; /* mask of permitted xpd_gains */
318 uint16_t channelValue;
319 uint16_t numPdGains;
320 uint16_t Vpd_I[MAX_NUM_PDGAINS_PER_CHANNEL];
322 uint16_t Vpd_delta[NUM_POINTS_LAST_PDGAIN]
330 uint16_t pChannels[NUM_11A_EEPROM_CHANNELS_2413];
331 uint16_t numChannels;
332 uint16_t xpd_mask; /* mask of permitted xpd_gains */
340 uint16_t ee_version; /* Version field */
341 uint16_t ee_protect; /* EEPROM protect field */
342 uint16_t ee_regdomain; /* Regulatory domain */
345 uint16_t ee_turbo5Disable;
346 uint16_t ee_turbo2Disable;
347 uint16_t ee_rfKill;
348 uint16_t ee_deviceType;
349 uint16_t ee_turbo2WMaxPower5;
350 uint16_t ee_turbo2WMaxPower2;
351 uint16_t ee_xrTargetPower5;
352 uint16_t ee_xrTargetPower2;
353 uint16_t ee_Amode;
354 uint16_t ee_regCap;
355 uint16_t ee_Bmode;
356 uint16_t ee_Gmode;
358 uint16_t ee_xtnd5GSupport;
361 uint16_t ee_targetPowersStart;
362 uint16_t ee_fixedBias5;
363 uint16_t ee_fixedBias2;
364 uint16_t ee_cckOfdmGainDelta;
365 uint16_t ee_scaledCh14FilterCckDelta;
366 uint16_t ee_eepMap;
367 uint16_t ee_earStart;
370 uint16_t ee_switchSettling[3];
371 uint16_t ee_txrxAtten[3];
372 uint16_t ee_txEndToXLNAOn[3];
373 uint16_t ee_thresh62[3];
374 uint16_t ee_txEndToXPAOff[3];
375 uint16_t ee_txFrameToXPAOn[3];
379 uint16_t ee_xlnaGain[3];
380 uint16_t ee_xgain[3];
381 uint16_t ee_xpd[3];
382 uint16_t ee_antennaControl[11][3];
383 uint16_t ee_falseDetectBackoff[3];
384 uint16_t ee_gainI[3];
385 uint16_t ee_rxtxMargin[3];
390 uint16_t ee_eepMap2PowerCalStart;
391 uint16_t ee_capField;
393 uint16_t ee_switchSettlingTurbo[2];
394 uint16_t ee_txrxAttenTurbo[2];
397 uint16_t ee_rxtxMarginTurbo[2];
400 uint16_t ee_ob1;
401 uint16_t ee_db1;
402 uint16_t ee_ob2;
403 uint16_t ee_db2;
404 uint16_t ee_ob3;
405 uint16_t ee_db3;
406 uint16_t ee_ob4;
407 uint16_t ee_db4;
410 uint16_t ee_obFor24;
411 uint16_t ee_dbFor24;
412 uint16_t ee_obFor24g;
413 uint16_t ee_dbFor24g;
414 uint16_t ee_ob2GHz[2];
415 uint16_t ee_db2GHz[2];
416 uint16_t ee_numCtls;
417 uint16_t ee_ctl[NUM_CTLS_MAX];
418 uint16_t ee_iqCalI[2];
419 uint16_t ee_iqCalQ[2];
420 uint16_t ee_calPier11g[NUM_2_4_EEPROM_CHANNELS];
421 uint16_t ee_calPier11b[NUM_2_4_EEPROM_CHANNELS];
426 uint16_t ee_opCap;
429 uint16_t ee_channels11a[NUM_11A_EEPROM_CHANNELS];
430 uint16_t ee_numChannels11a;
433 uint16_t ee_numChannels2_4;
434 uint16_t ee_channels11g[NUM_2_4_EEPROM_CHANNELS];
435 uint16_t ee_channels11b[NUM_2_4_EEPROM_CHANNELS];
436 uint16_t ee_spurChans[AR_EEPROM_MODAL_SPURS][2];