Lines Matching refs:timer
1651 * Thresholds for DMA count and timer interrupts.
1657 uint64_t time : 32; /**< Whenever the SLI_DMAx_TIM[TIM] timer exceeds
1659 The SLI_DMAx_TIM[TIM] timer increments every SLI
1692 uint64_t tim : 32; /**< The DMA timer value.
1693 The timer will increment when SLI_DMAx_CNT[CNT]!=0
2646 SLI_DMAx_TIM[TIM] timer increments every SLI
2792 SLI_DMAx_TIM[TIM] timer increments every SLI
2936 SLI_DMAx_TIM[TIM] timer increments every SLI
3065 SLI_DMAx_TIM[TIM] timer increments every SLI
3455 uint64_t timer : 10; /**< When the SLI starts a PP to MAC write it waits
3461 uint64_t timer : 10;
4283 uint64_t timer : 22; /**< Timer incremented every 1024 core clocks
4301 uint64_t timer : 22;
5737 uint64_t port : 32; /**< Output ring packet timer interrupt bits
5769 uint64_t port : 32; /**< Output ring packet timer interrupt enables
6303 * occurs on the RML 0xFFFF timer before the timeout for a BAR0 access from the MAC.