Lines Matching defs:chip_id
95 * @param chip_id Chip to read from
99 static uint8_t __cvmx_flash_read8(int chip_id, int offset)
101 return *(volatile uint8_t *)(flash_info[chip_id].base_ptr + offset);
109 * @param chip_id Chip to read from
113 static uint8_t __cvmx_flash_read_cmd(int chip_id, int offset)
115 if (flash_info[chip_id].is_16bit)
117 return __cvmx_flash_read8(chip_id, offset);
125 * @param chip_id Chip to read from
129 static uint16_t __cvmx_flash_read_cmd16(int chip_id, int offset)
131 uint16_t v = __cvmx_flash_read_cmd(chip_id, offset);
132 v |= __cvmx_flash_read_cmd(chip_id, offset + 1)<<8;
141 * @param chip_id Chip to write to
145 static void __cvmx_flash_write8(int chip_id, int offset, uint8_t data)
147 volatile uint8_t *flash_ptr = (volatile uint8_t *)flash_info[chip_id].base_ptr;
156 * @param chip_id Chip to write to
160 static void __cvmx_flash_write_cmd(int chip_id, int offset, uint8_t data)
162 volatile uint8_t *flash_ptr = (volatile uint8_t *)flash_info[chip_id].base_ptr;
163 flash_ptr[offset<<flash_info[chip_id].is_16bit] = data;
171 * @param chip_id Chip ID data to fill in if the chip is there
175 static int __cvmx_flash_queury_cfi(int chip_id, void *base_ptr)
178 cvmx_flash_t *flash = flash_info + chip_id;
185 __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
186 __cvmx_flash_write_cmd(chip_id, 0x55, 0x98);
189 if ((__cvmx_flash_read_cmd(chip_id, 0x10) != 'Q') ||
190 (__cvmx_flash_read_cmd(chip_id, 0x11) != 'R') ||
191 (__cvmx_flash_read_cmd(chip_id, 0x12) != 'Y'))
198 flash->vendor = __cvmx_flash_read_cmd16(chip_id, 0x13);
202 flash->write_timeout = 1ull << (__cvmx_flash_read_cmd(chip_id, 0x1f) +
203 __cvmx_flash_read_cmd(chip_id, 0x23));
207 flash->erase_timeout = 1ull << (__cvmx_flash_read_cmd(chip_id, 0x21) +
208 __cvmx_flash_read_cmd(chip_id, 0x25));
211 flash->size = 1<<__cvmx_flash_read_cmd(chip_id, 0x27);
214 flash->num_regions = __cvmx_flash_read_cmd(chip_id, 0x2c);
225 uint16_t blocks = __cvmx_flash_read_cmd16(chip_id, 0x2d + region*4);
231 uint16_t size = __cvmx_flash_read_cmd16(chip_id, 0x2d + region*4 + 2);
241 switch (flash_info[chip_id].vendor)
244 __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0);
247 __cvmx_flash_write_cmd(chip_id, 0x00, 0xff);
290 int chip_id = 0;
306 if (__cvmx_flash_queury_cfi(chip_id, base_ptr) == 0)
309 chip_id++;
314 if (chip_id == 0)
322 * @param chip_id Chip ID to return
325 void *cvmx_flash_get_base(int chip_id)
327 return flash_info[chip_id].base_ptr;
334 * @param chip_id Chip to return info for
337 int cvmx_flash_get_num_regions(int chip_id)
339 return flash_info[chip_id].num_regions;
346 * @param chip_id Chip to get info for
350 const cvmx_flash_region_t *cvmx_flash_get_region_info(int chip_id, int region)
352 return flash_info[chip_id].region + region;
359 * @param chip_id Chip to erase a block on
364 int cvmx_flash_erase_block(int chip_id, int region, int block)
369 chip_id, region, block);
372 int offset = flash_info[chip_id].region[region].start_offset +
373 block * flash_info[chip_id].region[region].block_size;
375 switch (flash_info[chip_id].vendor)
380 __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
381 __cvmx_flash_write_cmd(chip_id, 0x555, 0xaa);
382 __cvmx_flash_write_cmd(chip_id, 0x2aa, 0x55);
383 __cvmx_flash_write_cmd(chip_id, 0x555, 0x80);
384 __cvmx_flash_write_cmd(chip_id, 0x555, 0xaa);
385 __cvmx_flash_write_cmd(chip_id, 0x2aa, 0x55);
386 __cvmx_flash_write8(chip_id, offset, 0x30);
389 uint8_t status = __cvmx_flash_read8(chip_id, offset);
396 status = __cvmx_flash_read8(chip_id, offset);
406 old_status = __cvmx_flash_read8(chip_id, offset);
407 status = __cvmx_flash_read8(chip_id, offset);
424 if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].erase_timeout)
432 __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
440 __cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
441 __cvmx_flash_write8(chip_id, offset, 0x20);
442 __cvmx_flash_write8(chip_id, offset, 0xd0);
445 uint8_t status = __cvmx_flash_read8(chip_id, offset);
449 if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].erase_timeout)
455 status = __cvmx_flash_read8(chip_id, offset);
466 __cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
481 * @param chip_id Chip to write a block on
487 int cvmx_flash_write_block(int chip_id, int region, int block, const void *data)
492 chip_id, region, block);
494 int offset = flash_info[chip_id].region[region].start_offset +
495 block * flash_info[chip_id].region[region].block_size;
496 int len = flash_info[chip_id].region[region].block_size;
499 switch (flash_info[chip_id].vendor)
507 __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
508 __cvmx_flash_write_cmd(chip_id, 0x555, 0xaa);
509 __cvmx_flash_write_cmd(chip_id, 0x2aa, 0x55);
510 __cvmx_flash_write_cmd(chip_id, 0x555, 0xa0);
511 __cvmx_flash_write8(chip_id, offset, *ptr);
517 uint8_t status = __cvmx_flash_read8(chip_id, offset);
523 status = __cvmx_flash_read8(chip_id, offset);
534 if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].write_timeout)
547 __cvmx_flash_write_cmd(chip_id, 0x00, 0xf0); /* Reset the flash chip */
559 __cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
560 __cvmx_flash_write8(chip_id, offset, 0x40);
561 __cvmx_flash_write8(chip_id, offset, *ptr);
564 uint8_t status = __cvmx_flash_read8(chip_id, offset);
568 if (cvmx_get_cycle() > start_cycle + flash_info[chip_id].write_timeout)
574 status = __cvmx_flash_read8(chip_id, offset);
591 __cvmx_flash_write_cmd(chip_id, 0x00, 0xff); /* Reset the flash chip */
613 int chip_id;
617 for (chip_id=0; chip_id<MAX_NUM_FLASH_CHIPS; chip_id++)
619 if ((flash_info[chip_id].base_ptr <= address) &&
620 (flash_info[chip_id].base_ptr + flash_info[chip_id].size >= address + len))
624 if (chip_id == MAX_NUM_FLASH_CHIPS)
630 cvmx_flash_t *flash = flash_info + chip_id;
655 if (cvmx_flash_erase_block(chip_id, region, block))
658 if (cvmx_flash_write_block(chip_id, region, block, data))