Lines Matching refs:AM4_CLKCTRL_INDEX
9 #define AM4_CLKCTRL_INDEX(offset) ((offset) - AM4_CLKCTRL_OFFSET)
14 #define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
15 #define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
16 #define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228)
17 #define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230)
18 #define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328)
19 #define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338)
20 #define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340)
21 #define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348)
22 #define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350)
23 #define AM4_SMARTREFLEX1_CLKCTRL AM4_CLKCTRL_INDEX(0x358)
24 #define AM4_CONTROL_CLKCTRL AM4_CLKCTRL_INDEX(0x360)
25 #define AM4_GPIO1_CLKCTRL AM4_CLKCTRL_INDEX(0x368)
28 #define AM4_MPU_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
31 #define AM4_GFX_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
34 #define AM4_RTC_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
37 #define AM4_L3_MAIN_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
38 #define AM4_AES_CLKCTRL AM4_CLKCTRL_INDEX(0x28)
39 #define AM4_DES_CLKCTRL AM4_CLKCTRL_INDEX(0x30)
40 #define AM4_L3_INSTR_CLKCTRL AM4_CLKCTRL_INDEX(0x40)
41 #define AM4_OCMCRAM_CLKCTRL AM4_CLKCTRL_INDEX(0x50)
42 #define AM4_SHAM_CLKCTRL AM4_CLKCTRL_INDEX(0x58)
43 #define AM4_VPFE0_CLKCTRL AM4_CLKCTRL_INDEX(0x68)
44 #define AM4_VPFE1_CLKCTRL AM4_CLKCTRL_INDEX(0x70)
45 #define AM4_TPCC_CLKCTRL AM4_CLKCTRL_INDEX(0x78)
46 #define AM4_TPTC0_CLKCTRL AM4_CLKCTRL_INDEX(0x80)
47 #define AM4_TPTC1_CLKCTRL AM4_CLKCTRL_INDEX(0x88)
48 #define AM4_TPTC2_CLKCTRL AM4_CLKCTRL_INDEX(0x90)
49 #define AM4_L4_HS_CLKCTRL AM4_CLKCTRL_INDEX(0xa0)
50 #define AM4_GPMC_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
51 #define AM4_MCASP0_CLKCTRL AM4_CLKCTRL_INDEX(0x238)
52 #define AM4_MCASP1_CLKCTRL AM4_CLKCTRL_INDEX(0x240)
53 #define AM4_MMC3_CLKCTRL AM4_CLKCTRL_INDEX(0x248)
54 #define AM4_QSPI_CLKCTRL AM4_CLKCTRL_INDEX(0x258)
55 #define AM4_USB_OTG_SS0_CLKCTRL AM4_CLKCTRL_INDEX(0x260)
56 #define AM4_USB_OTG_SS1_CLKCTRL AM4_CLKCTRL_INDEX(0x268)
57 #define AM4_PRUSS_CLKCTRL AM4_CLKCTRL_INDEX(0x320)
58 #define AM4_L4_LS_CLKCTRL AM4_CLKCTRL_INDEX(0x420)
59 #define AM4_D_CAN0_CLKCTRL AM4_CLKCTRL_INDEX(0x428)
60 #define AM4_D_CAN1_CLKCTRL AM4_CLKCTRL_INDEX(0x430)
61 #define AM4_EPWMSS0_CLKCTRL AM4_CLKCTRL_INDEX(0x438)
62 #define AM4_EPWMSS1_CLKCTRL AM4_CLKCTRL_INDEX(0x440)
63 #define AM4_EPWMSS2_CLKCTRL AM4_CLKCTRL_INDEX(0x448)
64 #define AM4_EPWMSS3_CLKCTRL AM4_CLKCTRL_INDEX(0x450)
65 #define AM4_EPWMSS4_CLKCTRL AM4_CLKCTRL_INDEX(0x458)
66 #define AM4_EPWMSS5_CLKCTRL AM4_CLKCTRL_INDEX(0x460)
67 #define AM4_ELM_CLKCTRL AM4_CLKCTRL_INDEX(0x468)
68 #define AM4_GPIO2_CLKCTRL AM4_CLKCTRL_INDEX(0x478)
69 #define AM4_GPIO3_CLKCTRL AM4_CLKCTRL_INDEX(0x480)
70 #define AM4_GPIO4_CLKCTRL AM4_CLKCTRL_INDEX(0x488)
71 #define AM4_GPIO5_CLKCTRL AM4_CLKCTRL_INDEX(0x490)
72 #define AM4_GPIO6_CLKCTRL AM4_CLKCTRL_INDEX(0x498)
73 #define AM4_HDQ1W_CLKCTRL AM4_CLKCTRL_INDEX(0x4a0)
74 #define AM4_I2C2_CLKCTRL AM4_CLKCTRL_INDEX(0x4a8)
75 #define AM4_I2C3_CLKCTRL AM4_CLKCTRL_INDEX(0x4b0)
76 #define AM4_MAILBOX_CLKCTRL AM4_CLKCTRL_INDEX(0x4b8)
77 #define AM4_MMC1_CLKCTRL AM4_CLKCTRL_INDEX(0x4c0)
78 #define AM4_MMC2_CLKCTRL AM4_CLKCTRL_INDEX(0x4c8)
79 #define AM4_RNG_CLKCTRL AM4_CLKCTRL_INDEX(0x4e0)
80 #define AM4_SPI0_CLKCTRL AM4_CLKCTRL_INDEX(0x500)
81 #define AM4_SPI1_CLKCTRL AM4_CLKCTRL_INDEX(0x508)
82 #define AM4_SPI2_CLKCTRL AM4_CLKCTRL_INDEX(0x510)
83 #define AM4_SPI3_CLKCTRL AM4_CLKCTRL_INDEX(0x518)
84 #define AM4_SPI4_CLKCTRL AM4_CLKCTRL_INDEX(0x520)
85 #define AM4_SPINLOCK_CLKCTRL AM4_CLKCTRL_INDEX(0x528)
86 #define AM4_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x530)
87 #define AM4_TIMER3_CLKCTRL AM4_CLKCTRL_INDEX(0x538)
88 #define AM4_TIMER4_CLKCTRL AM4_CLKCTRL_INDEX(0x540)
89 #define AM4_TIMER5_CLKCTRL AM4_CLKCTRL_INDEX(0x548)
90 #define AM4_TIMER6_CLKCTRL AM4_CLKCTRL_INDEX(0x550)
91 #define AM4_TIMER7_CLKCTRL AM4_CLKCTRL_INDEX(0x558)
92 #define AM4_TIMER8_CLKCTRL AM4_CLKCTRL_INDEX(0x560)
93 #define AM4_TIMER9_CLKCTRL AM4_CLKCTRL_INDEX(0x568)
94 #define AM4_TIMER10_CLKCTRL AM4_CLKCTRL_INDEX(0x570)
95 #define AM4_TIMER11_CLKCTRL AM4_CLKCTRL_INDEX(0x578)
96 #define AM4_UART2_CLKCTRL AM4_CLKCTRL_INDEX(0x580)
97 #define AM4_UART3_CLKCTRL AM4_CLKCTRL_INDEX(0x588)
98 #define AM4_UART4_CLKCTRL AM4_CLKCTRL_INDEX(0x590)
99 #define AM4_UART5_CLKCTRL AM4_CLKCTRL_INDEX(0x598)
100 #define AM4_UART6_CLKCTRL AM4_CLKCTRL_INDEX(0x5a0)
101 #define AM4_OCP2SCP0_CLKCTRL AM4_CLKCTRL_INDEX(0x5b8)
102 #define AM4_OCP2SCP1_CLKCTRL AM4_CLKCTRL_INDEX(0x5c0)
103 #define AM4_EMIF_CLKCTRL AM4_CLKCTRL_INDEX(0x720)
104 #define AM4_DSS_CORE_CLKCTRL AM4_CLKCTRL_INDEX(0xa20)
105 #define AM4_CPGMAC0_CLKCTRL AM4_CLKCTRL_INDEX(0xb20)
134 #define AM4_MPU_MPU_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
137 #define AM4_GFX_L3_GFX_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
140 #define AM4_L4_RTC_RTC_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
143 #define AM4_L3_L3_MAIN_CLKCTRL AM4_CLKCTRL_INDEX(0x20)
144 #define AM4_L3_AES_CLKCTRL AM4_CLKCTRL_INDEX(0x28)
145 #define AM4_L3_DES_CLKCTRL AM4_CLKCTRL_INDEX(0x30)
146 #define AM4_L3_L3_INSTR_CLKCTRL AM4_CLKCTRL_INDEX(0x40)
147 #define AM4_L3_OCMCRAM_CLKCTRL AM4_CLKCTRL_INDEX(0x50)
148 #define AM4_L3_SHAM_CLKCTRL AM4_CLKCTRL_INDEX(0x58)
149 #define AM4_L3_TPCC_CLKCTRL AM4_CLKCTRL_INDEX(0x78)
150 #define AM4_L3_TPTC0_CLKCTRL AM4_CLKCTRL_INDEX(0x80)
151 #define AM4_L3_TPTC1_CLKCTRL AM4_CLKCTRL_INDEX(0x88)
152 #define AM4_L3_TPTC2_CLKCTRL AM4_CLKCTRL_INDEX(0x90)
153 #define AM4_L3_L4_HS_CLKCTRL AM4_CLKCTRL_INDEX(0xa0)