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  • only in /freebsd-13-stable/sys/contrib/dev/ath/ath_hal/ar9300/

Lines Matching refs:is_2ghz

48     int spur_chan, HAL_BOOL is_2ghz);
685 u_int16_t freq, HAL_BOOL is_2ghz)
694 if (is_2ghz) {
709 freq_array[i] = FBIN2FREQ(p_freq_bin[i], is_2ghz);
721 u_int16_t freq, HAL_BOOL is_2ghz)
730 if (is_2ghz) {
745 freq_array[i] = FBIN2FREQ(p_freq_bin[i], is_2ghz);
757 u_int16_t freq, HAL_BOOL is_2ghz)
766 if (is_2ghz) {
781 freq_array[i] = FBIN2FREQ(p_freq_bin[i], is_2ghz);
970 HAL_BOOL is_2ghz = 0;
973 is_2ghz = 1;
978 ah, LEGACY_TARGET_RATE_6_24, freq, is_2ghz);
981 ah, LEGACY_TARGET_RATE_36, freq, is_2ghz);
984 ah, LEGACY_TARGET_RATE_48, freq, is_2ghz);
987 ah, LEGACY_TARGET_RATE_54, freq, is_2ghz);
1002 ah, HT_TARGET_RATE_0_8_16, freq, is_2ghz);
1005 ah, HT_TARGET_RATE_1_3_9_11_17_19, freq, is_2ghz);
1008 ah, HT_TARGET_RATE_4, freq, is_2ghz);
1011 ah, HT_TARGET_RATE_5, freq, is_2ghz);
1014 ah, HT_TARGET_RATE_6, freq, is_2ghz);
1017 ah, HT_TARGET_RATE_7, freq, is_2ghz);
1020 ah, HT_TARGET_RATE_12, freq, is_2ghz);
1023 ah, HT_TARGET_RATE_13, freq, is_2ghz);
1026 ah, HT_TARGET_RATE_14, freq, is_2ghz);
1029 ah, HT_TARGET_RATE_15, freq, is_2ghz);
1032 ah, HT_TARGET_RATE_20, freq, is_2ghz);
1035 ah, HT_TARGET_RATE_21, freq, is_2ghz);
1038 ah, HT_TARGET_RATE_22, freq, is_2ghz);
1041 ah, HT_TARGET_RATE_23, freq, is_2ghz);
1044 ah, HT_TARGET_RATE_0_8_16, freq, is_2ghz) +
1048 ah, HT_TARGET_RATE_1_3_9_11_17_19, freq, is_2ghz) +
1052 ah, HT_TARGET_RATE_4, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1055 ah, HT_TARGET_RATE_5, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1058 ah, HT_TARGET_RATE_6, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1061 ah, HT_TARGET_RATE_7, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1064 ah, HT_TARGET_RATE_12, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1067 ah, HT_TARGET_RATE_13, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1070 ah, HT_TARGET_RATE_14, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1073 ah, HT_TARGET_RATE_15, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1076 ah, HT_TARGET_RATE_20, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1079 ah, HT_TARGET_RATE_21, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1082 ah, HT_TARGET_RATE_22, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1085 ah, HT_TARGET_RATE_23, freq, is_2ghz) + ht40_power_inc_for_pdadc;
1165 int is_2ghz;
1179 is_2ghz = (frequency < 4000);
1180 if (is_2ghz) {
1192 fx[nnf] = FBIN2FREQ(p_cal_pier[ipier], is_2ghz);
1496 int32_t ar9300_xpa_bias_level_get(struct ath_hal *ah, HAL_BOOL is_2ghz)
1499 if (is_2ghz) {
1506 HAL_BOOL ar9300_xpa_bias_level_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
1513 bias = ar9300_xpa_bias_level_get(ah, is_2ghz);
1536 u_int32_t ar9300_ant_ctrl_common_get(struct ath_hal *ah, HAL_BOOL is_2ghz)
1539 if (is_2ghz) {
1546 ar9300_switch_com_spdt_get(struct ath_hal *ah, HAL_BOOL is_2ghz)
1549 if (is_2ghz) {
1555 u_int32_t ar9300_ant_ctrl_common2_get(struct ath_hal *ah, HAL_BOOL is_2ghz)
1558 if (is_2ghz) {
1566 HAL_BOOL is_2ghz)
1570 if (is_2ghz) {
1634 HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
1670 value = ar9300_ant_ctrl_common_get(ah, is_2ghz);
1703 value = ar9300_switch_com_spdt_get(ah, is_2ghz);
1715 value = ar9300_ant_ctrl_common2_get(ah, is_2ghz);
1727 value = ar9300_ant_ctrl_chain_get(ah, 0, is_2ghz);
1731 value = ar9300_ant_ctrl_chain_get(ah, 1, is_2ghz);
1735 value = ar9300_ant_ctrl_chain_get(ah, 2, is_2ghz);
2099 int is_2ghz;
2118 is_2ghz = 0;
2129 is_2ghz = 1;
2131 *pfrequency = FBIN2FREQ(*p_cal_pier, is_2ghz);
2458 int idx, HAL_BOOL is_2ghz)
2461 u_int8_t *ctl_freqbin = is_2ghz ?
2464 u_int16_t num_edges = is_2ghz ?
2475 if (freq == fbin2freq(ctl_freqbin[i], is_2ghz)) {
2476 if (is_2ghz) {
2484 } else if ((i > 0) && (freq < fbin2freq(ctl_freqbin[i], is_2ghz))) {
2485 if (is_2ghz) {
2513 if (is_2ghz && (twice_max_edge_power == 0)) {
3573 ar9300_eeprom_get_spur_chan(struct ath_hal *ah, int i, HAL_BOOL is_2ghz)
3584 i, is_2ghz,
3585 AH_PRIVATE(ah)->ah_config.ath_hal_spur_chans[i][is_2ghz]);
3592 spur_val = AH_PRIVATE(ah)->ah_config.ath_hal_spur_chans[i][is_2ghz];
3597 spur_val = eep->modal_header[is_2ghz].spur_chans[i].spur_chan;
4600 HAL_BOOL ar9300_xpa_timing_control_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
4606 if (is_2ghz) {
4627 HAL_BOOL ar9300_x_lNA_bias_strength_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
4635 if (is_2ghz) {
4694 ar9300_eeprom_get_spur_chans_ptr(struct ath_hal *ah, HAL_BOOL is_2ghz)
4698 if (is_2ghz) {