Lines Matching refs:regs_base
70 * @param regs_base regs pointer to interrupt controller registers
76 int al_iofic_config(void __iomem *regs_base, int group,
83 * @param regs_base pointer to unit registers
91 int al_iofic_moder_res_config(void __iomem *regs_base, int group,
97 * @param regs_base regs pointer to unit registers
103 int al_iofic_legacy_moder_interval_config(void __iomem *regs_base, int group,
109 * @param regs_base pointer to unit registers
116 int al_iofic_msix_moder_interval_config(void __iomem *regs_base, int group,
129 int al_iofic_msix_tgtid_attributes_config(void __iomem *regs_base, int group,
137 * @param regs_base regs pointer to unit registers
141 uint32_t __iomem * al_iofic_unmask_offset_get(void __iomem *regs_base, int group);
150 * @param regs_base pointer to unit registers
154 void al_iofic_unmask(void __iomem *regs_base, int group, uint32_t mask);
161 * @param regs_base pointer to unit registers
165 void al_iofic_mask(void __iomem *regs_base, int group, uint32_t mask);
171 * @param regs_base pointer to unit registers
174 uint32_t al_iofic_read_mask(void __iomem *regs_base, int group);
179 * @param regs_base pointer to unit registers
182 uint32_t al_iofic_read_cause(void __iomem *regs_base, int group);
187 * @param regs_base pointer to unit registers
191 void al_iofic_clear_cause(void __iomem *regs_base, int group, uint32_t mask);
198 * @param regs_base pointer to unit registers
202 void al_iofic_set_cause(void __iomem *regs_base, int group, uint32_t mask);
207 * @param regs_base pointer to unit registers
211 void al_iofic_abort_mask(void __iomem *regs_base, int group, uint32_t mask);
216 * @param regs_base pointer to unit registers
219 void al_iofic_interrupt_moderation_reset(void __iomem *regs_base, int group);