Lines Matching refs:SDValue
49 inline SDValue getI32Imm(unsigned Imm, const SDLoc &dl) {
65 bool SelectADDRspii(SDValue Addr, SDValue &Base, SDValue &Offset);
67 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
68 std::vector<SDValue> &OutOps) override;
87 bool XCoreDAGToDAGISel::SelectADDRspii(SDValue Addr, SDValue &Base,
88 SDValue &Offset) {
111 SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
112 std::vector<SDValue> &OutOps) {
113 SDValue Reg;
141 SDValue MskSize = getI32Imm(32 - countLeadingZeros((uint32_t)Val), dl);
147 SDValue CPIdx = CurDAG->getTargetConstantPool(
163 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
170 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
177 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
184 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
191 SDValue Ops[] = { N->getOperand(0), N->getOperand(1),
198 SDValue Ops[] = { N->getOperand(0), N->getOperand(1), N->getOperand(2) };
214 /// this instruction must be a TokenFactor. Returns an empty SDValue if
216 static SDValue
217 replaceInChain(SelectionDAG *CurDAG, SDValue Chain, SDValue Old, SDValue New)
222 return SDValue();
223 SmallVector<SDValue, 8> Ops;
234 return SDValue();
241 SDValue Chain = N->getOperand(0);
242 SDValue Addr = N->getOperand(1);
248 SDValue nextAddr = Addr->getOperand(2);
249 SDValue CheckEventChainOut(Addr.getNode(), 1);
255 SDValue CheckEventChainIn = Addr->getOperand(0);
256 SDValue NewChain = replaceInChain(CurDAG, Chain, CheckEventChainOut,
266 SDValue constOne = getI32Imm(1, dl);
267 SDValue Glue =
268 SDValue(CurDAG->getMachineNode(XCore::SETSR_branch_u6, dl, MVT::Glue,
271 SDValue(CurDAG->getMachineNode(XCore::CLRSR_branch_u6, dl, MVT::Glue,