Lines Matching refs:v64i8
1464 addRegisterClass(MVT::v64i8, &X86::VR512RegClass);
1547 setOperationAction(ISD::SIGN_EXTEND, MVT::v64i8, Custom);
1548 setOperationAction(ISD::ZERO_EXTEND, MVT::v64i8, Custom);
1549 setOperationAction(ISD::ANY_EXTEND, MVT::v64i8, Custom);
1574 setOperationAction(ISD::ADD, MVT::v64i8, HasBWI ? Legal : Custom);
1575 setOperationAction(ISD::SUB, MVT::v64i8, HasBWI ? Legal : Custom);
1580 setOperationAction(ISD::MUL, MVT::v64i8, Custom);
1586 setOperationAction(ISD::MULHS, MVT::v64i8, Custom);
1587 setOperationAction(ISD::MULHU, MVT::v64i8, Custom);
1589 setOperationAction(ISD::BITREVERSE, MVT::v64i8, Custom);
1591 for (auto VT : { MVT::v64i8, MVT::v32i16, MVT::v16i32, MVT::v8i64 }) {
1615 for (auto VT : { MVT::v64i8, MVT::v32i16 }) {
1661 for (auto VT : { MVT::v64i8, MVT::v32i16, MVT::v16i32, MVT::v8i64,
1681 for (auto VT : { MVT::v64i8, MVT::v32i16 }) {
1687 setOperationAction(ISD::STORE, MVT::v64i8, Custom);
1793 // AVX512BW. 512-bit v32i16 and v64i8 vector legalization is controlled with
2080 // Split v64i1 vectors if we don't have v64i8 available.
2083 return {MVT::v64i8, 1};
2146 // Split v64i1 vectors if we don't have v64i8 available.
2247 return Subtarget.hasBWI() ? MVT::v64i8 : MVT::v16i32;
2424 case MVT::v64i8: case MVT::v32i16: case MVT::v16i32: case MVT::v8i64:
10015 case MVT::v64i8:
11801 case MVT::v64i8: {
17436 assert(V1.getSimpleValueType() == MVT::v64i8 && "Bad operand type!");
17437 assert(V2.getSimpleValueType() == MVT::v64i8 && "Bad operand type!");
17439 assert(Subtarget.hasBWI() && "We can only lower v64i8 with AVX-512-BWI!");
17445 DL, MVT::v64i8, V1, V2, Mask, Zeroable, Subtarget, DAG))
17449 if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v64i8, Mask, V1, V2, DAG))
17453 if (SDValue V = lowerShuffleWithPACK(DL, MVT::v64i8, Mask, V1, V2, DAG,
17458 if (SDValue Shift = lowerShuffleAsShift(DL, MVT::v64i8, V1, V2, Mask,
17463 if (SDValue Rotate = lowerShuffleAsByteRotate(DL, MVT::v64i8, V1, V2, Mask,
17470 lowerShuffleAsBitRotate(DL, MVT::v64i8, V1, Mask, Subtarget, DAG))
17474 if (SDValue Masked = lowerShuffleAsBitMask(DL, MVT::v64i8, V1, V2, Mask,
17478 if (SDValue PSHUFB = lowerShuffleWithPSHUFB(DL, MVT::v64i8, Mask, V1, V2,
17484 return lowerShuffleWithPERMV(DL, MVT::v64i8, Mask, V1, V2, DAG);
17489 DL, MVT::v64i8, V1, V2, Mask, Subtarget, DAG))
17492 if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v64i8, V1, V2, Mask,
17500 DL, MVT::v64i8, V1, V2, Mask, Subtarget, DAG))
17504 return splitAndLowerShuffle(DL, MVT::v64i8, V1, V2, Mask, DAG);
17540 if ((VT == MVT::v32i16 || VT == MVT::v64i8) && !Subtarget.hasBWI()) {
17567 case MVT::v64i8:
17766 ExtVT = MVT::v64i8;
18034 // Expand v32i16/v64i8 without BWI.
18035 if ((VT == MVT::v32i16 || VT == MVT::v64i8) && !Subtarget.hasBWI())
22458 if (VT == MVT::v32i16 || VT == MVT::v64i8) {
23311 // MVT::v64i8 when BWI is not supported, but AVX512 is.
23578 ((StoreVT == MVT::v32i16 || StoreVT == MVT::v64i8) &&
26414 if (VT == MVT::v32i16 || VT == MVT::v64i8)
26465 if (VT == MVT::v32i16 || VT == MVT::v64i8)
26504 if ((VT == MVT::v32i16 || VT == MVT::v64i8) && !Subtarget.hasBWI())
26518 if (VT == MVT::v32i16 || VT == MVT::v64i8)
26565 if ((VT == MVT::v32i16 || VT == MVT::v64i8) && !Subtarget.hasBWI())
26571 // Lower v16i8/v32i8/v64i8 mul as sign-extension to v8i16/v16i16/v32i16
26573 if (VT == MVT::v16i8 || VT == MVT::v32i8 || VT == MVT::v64i8) {
26714 if ((VT == MVT::v32i16 || VT == MVT::v64i8) && !Subtarget.hasBWI())
26784 (VT == MVT::v64i8 && Subtarget.hasBWI())) &&
27066 (Subtarget.hasBWI() && VT == MVT::v64i8)) {
27078 assert(VT == MVT::v64i8 && "Unexpected element type!");
27147 VT == MVT::v64i8) &&
27513 (VT == MVT::v64i8 && Subtarget.hasBWI())) &&
27560 (VT == MVT::v64i8 && Subtarget.hasBWI())) {
27753 if (VT == MVT::v32i16 || VT == MVT::v64i8)
28242 if (InVT == MVT::v64i8) {
28555 // Split v64i8 without BWI so that we can still use the PSHUFB lowering.
28556 if (VT == MVT::v64i8 && !Subtarget.hasBWI())
34254 ((MaskVT == MVT::v32i16 || MaskVT == MVT::v64i8) && Subtarget.hasBWI())) {
34909 (Subtarget.hasVBMI() && MaskVT == MVT::v64i8) ||
34928 (Subtarget.hasVBMI() && MaskVT == MVT::v64i8) ||
34959 (Subtarget.hasVBMI() && MaskVT == MVT::v64i8) ||
35133 (Subtarget.hasVBMI() && MaskVT == MVT::v64i8) ||
38041 Src.getOperand(0).getValueType() == MVT::v64i8);
38112 // v64i8 checked earlier. Then split the input and make two pmovmskbs.
38116 SExtVT = MVT::v64i8;
38121 SExtVT = MVT::v64i8;
38130 if (SExtVT == MVT::v16i8 || SExtVT == MVT::v32i8 || SExtVT == MVT::v64i8) {
46434 VecVT = MVT::v64i8;
49887 case MVT::v64i8:
49940 case MVT::v64i8: