Lines Matching refs:InVT
6205 EVT InVT = In.getValueType();
6206 assert(VT.isVector() && InVT.isVector() && "Expected vector VTs.");
6213 if (InVT.getSizeInBits() > 128) {
6214 assert(VT.getSizeInBits() == InVT.getSizeInBits() &&
6216 unsigned Scale = VT.getScalarSizeInBits() / InVT.getScalarSizeInBits();
6219 InVT = In.getValueType();
6222 if (VT.getVectorNumElements() != InVT.getVectorNumElements())
20201 MVT InVT = In.getSimpleValueType();
20205 assert(VT.isVector() && InVT.isVector() && "Expected vector type");
20208 assert(VT.getVectorNumElements() == InVT.getVectorNumElements() &&
20214 assert((InVT.getVectorElementType() == MVT::i8 ||
20215 InVT.getVectorElementType() == MVT::i16 ||
20216 InVT.getVectorElementType() == MVT::i32) &&
20222 assert(InVT == MVT::v32i8 && "Unexpected VT!");
20250 SDValue ZeroVec = DAG.getConstant(0, dl, InVT);
20251 SDValue Undef = DAG.getUNDEF(InVT);
20253 SDValue OpHi = getUnpackh(DAG, dl, InVT, In, NeedZero ? ZeroVec : Undef);
20278 MVT InVT = In.getSimpleValueType();
20279 assert(InVT.getVectorElementType() == MVT::i1 && "Unexpected input type!");
20305 InVT = MVT::getVectorVT(MVT::i1, NumElts);
20306 In = DAG.getNode(ISD::INSERT_SUBVECTOR, DL, InVT, DAG.getUNDEF(InVT),
20384 EVT InVT = MVT::i16, OutVT = MVT::i8;
20387 InVT = MVT::i32;
20393 InVT = EVT::getVectorVT(Ctx, InVT, 128 / InVT.getSizeInBits());
20395 In = DAG.getBitcast(InVT, In);
20396 SDValue Res = DAG.getNode(Opcode, DL, OutVT, In, DAG.getUNDEF(InVT));
20406 InVT = EVT::getVectorVT(Ctx, InVT, SubSizeInBits / InVT.getSizeInBits());
20411 Lo = DAG.getBitcast(InVT, Lo);
20412 Hi = DAG.getBitcast(InVT, Hi);
20420 Lo = DAG.getBitcast(InVT, Lo);
20421 Hi = DAG.getBitcast(InVT, Hi);
20458 MVT InVT = In.getSimpleValueType();
20463 unsigned ShiftInx = InVT.getScalarSizeInBits() - 1;
20464 if (InVT.getScalarSizeInBits() <= 16) {
20467 if (DAG.ComputeNumSignBits(In) < InVT.getScalarSizeInBits()) {
20470 MVT ExtVT = MVT::getVectorVT(MVT::i16, InVT.getSizeInBits()/16);
20474 In = DAG.getBitcast(InVT, In);
20476 return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, InVT),
20480 assert((InVT.is256BitVector() || InVT.is128BitVector()) &&
20482 unsigned NumElts = InVT.getVectorNumElements();
20495 if (InVT == MVT::v16i8) {
20498 InVT, DL, In, In,
20502 assert(InVT == MVT::v16i16 && "Unexpected VT!");
20518 InVT = ExtVT;
20519 ShiftInx = InVT.getScalarSizeInBits() - 1;
20522 if (DAG.ComputeNumSignBits(In) < InVT.getScalarSizeInBits()) {
20524 In = DAG.getNode(ISD::SHL, DL, InVT, In,
20525 DAG.getConstant(ShiftInx, DL, InVT));
20529 return DAG.getSetCC(DL, VT, DAG.getConstant(0, DL, InVT), In, ISD::SETGT);
20530 return DAG.getSetCC(DL, VT, In, DAG.getConstant(0, DL, InVT), ISD::SETNE);
20537 MVT InVT = In.getSimpleValueType();
20538 unsigned InNumEltBits = InVT.getScalarSizeInBits();
20540 assert(VT.getVectorNumElements() == InVT.getVectorNumElements() &&
20545 if (!TLI.isTypeLegal(InVT)) {
20546 if ((InVT == MVT::v8i64 || InVT == MVT::v16i32 || InVT == MVT::v16i64) &&
20548 assert((InVT == MVT::v16i64 || Subtarget.hasVLX()) &&
20573 if (InVT == MVT::v32i16 && !Subtarget.hasBWI()) {
20582 if (InVT != MVT::v16i16 || Subtarget.hasBWI() ||
20607 assert(VT.is128BitVector() && InVT.is256BitVector() && "Unexpected types!");
20609 if ((VT == MVT::v4i32) && (InVT == MVT::v4i64)) {
20629 if ((VT == MVT::v8i16) && (InVT == MVT::v8i32)) {
20674 if (VT == MVT::v16i8 && InVT == MVT::v16i16) {
20676 In = DAG.getNode(ISD::AND, DL, InVT, In, DAG.getConstant(255, DL, InVT));
23244 MVT InVT = In.getSimpleValueType();
23245 assert(InVT.getVectorElementType() == MVT::i1 && "Unexpected input type!");
23265 InVT = MVT::getVectorVT(MVT::i1, NumElts);
23266 In = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, InVT, DAG.getUNDEF(InVT),
23299 MVT InVT = In.getSimpleValueType();
23301 if (InVT.getVectorElementType() == MVT::i1)
23317 MVT InVT = In.getSimpleValueType();
23320 MVT InSVT = InVT.getVectorElementType();
23338 if (InVT.getSizeInBits() > 128) {
23343 InVT = In.getSimpleValueType();
23352 if (InVT.getVectorNumElements() != NumElts)
23369 unsigned NumSrcElts = InVT.getVectorNumElements();
23375 SDValue Hi = DAG.getVectorShuffle(InVT, dl, In, DAG.getUNDEF(InVT), HiMask);
23382 assert(VT.is128BitVector() && InVT.is128BitVector() && "Unexpected VTs");
23390 if (InVT != MVT::v4i32) {
23396 unsigned InNumElts = InVT.getVectorNumElements();
23405 Curr = DAG.getVectorShuffle(InVT, dl, In, In, Mask);
23428 MVT InVT = In.getSimpleValueType();
23431 if (InVT.getVectorElementType() == MVT::i1)
23434 assert(VT.isVector() && InVT.isVector() && "Expected vector type");
23435 assert(VT.getVectorNumElements() == InVT.getVectorNumElements() &&
23441 assert((InVT.getVectorElementType() == MVT::i8 ||
23442 InVT.getVectorElementType() == MVT::i16 ||
23443 InVT.getVectorElementType() == MVT::i32) &&
23447 assert(InVT == MVT::v32i8 && "Unexpected VT!");
23465 unsigned NumElems = InVT.getVectorNumElements();
23470 SDValue OpHi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask);
28240 MVT InVT = V.getSimpleValueType();
28242 if (InVT == MVT::v64i8) {
28253 if (InVT == MVT::v32i8 && !Subtarget.hasInt256()) {
28858 MVT InVT = InOp.getSimpleValueType();
28859 if (InVT == NVT)
28865 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
28868 unsigned InNumElts = InVT.getVectorNumElements();
28880 InVT = InOp.getSimpleValueType();
28881 InNumElts = InVT.getVectorNumElements();
29456 EVT InVT = N->getOperand(0).getValueType();
29461 unsigned NumConcat = 128 / InVT.getSizeInBits();
29464 InVT.getVectorElementType(),
29465 NumConcat * InVT.getVectorNumElements());
29470 SmallVector<SDValue, 16> Ops(NumConcat, DAG.getUNDEF(InVT));
29560 EVT InVT = In.getValueType();
29562 unsigned InBits = InVT.getSizeInBits();
29567 MVT InEltVT = InVT.getSimpleVT().getVectorElementType();
29585 if (Subtarget.hasAVX512() && isTypeLegal(InVT)) {
29592 if (InVT == MVT::v4i64 && VT == MVT::v4i8 && isTypeLegal(MVT::v8i64)) {
29599 if (Subtarget.hasVLX() && InVT == MVT::v8i64 && VT == MVT::v8i8 &&
29600 getTypeAction(*DAG.getContext(), InVT) == TypeSplitVector &&
29628 EVT InVT = In.getValueType();
29630 (InVT == MVT::v4i16 || InVT == MVT::v4i8)){
29631 assert(getTypeAction(*DAG.getContext(), InVT) == TypeWidenVector &&
29659 if (!InVT.is128BitVector()) {
29662 if (getTypeAction(*DAG.getContext(), InVT) != TypePromoteInteger)
29664 InVT = getTypeToTransformTo(*DAG.getContext(), InVT);
29665 if (!InVT.is128BitVector())
29670 In = DAG.getNode(N->getOpcode(), dl, InVT, In);
29682 unsigned NumElts = InVT.getVectorNumElements();
29688 SDValue Hi = DAG.getVectorShuffle(InVT, dl, In, In, ShufMask);
38663 EVT InVT = Zext0.getOperand(0).getValueType();
38664 unsigned RegSize = std::max(128u, (unsigned)InVT.getSizeInBits());
38668 unsigned NumConcat = RegSize / InVT.getSizeInBits();
38669 SmallVector<SDValue, 16> Ops(NumConcat, DAG.getConstant(0, DL, InVT));
43463 EVT InVT = In.getValueType();
43465 // Saturation with truncation. We truncate from InVT to VT.
43466 assert(InVT.getScalarSizeInBits() > VT.getScalarSizeInBits() &&
43493 return DAG.getNode(ISD::SMAX, DL, InVT, SMin, In.getOperand(1));
43549 EVT InVT = In.getValueType();
43550 EVT InSVT = InVT.getVectorElementType();
43557 InVT == MVT::v16i32 && VT == MVT::v16i8) {
43575 (InVT.getSizeInBits() > 128) &&
43576 (Subtarget.hasVLX() || InVT.getSizeInBits() > 256) &&
43607 if (TLI.isTypeLegal(InVT) && InVT.isVector() && SVT != MVT::i1 &&
43622 if (!Subtarget.hasVLX() && !InVT.is512BitVector()) {
43623 unsigned NumConcats = 512 / InVT.getSizeInBits();
43625 SmallVector<SDValue, 4> ConcatOps(NumConcats, DAG.getUNDEF(InVT));
43627 InVT = EVT::getVectorVT(*DAG.getContext(), InSVT,
43628 NumConcats * InVT.getVectorNumElements());
43629 SatVal = DAG.getNode(ISD::CONCAT_VECTORS, DL, InVT, ConcatOps);
43652 EVT InVT = In.getValueType();
43662 EVT InScalarVT = InVT.getVectorElementType();
43715 SDValue VecOnes = DAG.getConstant(1, DL, InVT);
43716 Operands[1] = DAG.getNode(ISD::SUB, DL, InVT, Operands[1], VecOnes);
44678 EVT InVT = In.getValueType();
44681 APInt Mask = APInt::getLowBitsSet(InVT.getScalarSizeInBits(),
44683 In = DAG.getNode(ISD::AND, DL, InVT, In, DAG.getConstant(Mask, DL, InVT));
44692 EVT InVT = In.getValueType();
44694 In = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, InVT, In,
44714 EVT InVT = In.getValueType();
44724 EVT InSVT = InVT.getVectorElementType();
44768 MVT InVT = In.getValueType().getSimpleVT();
44769 MVT InSVT = InVT.getScalarType();
44787 InVT.is512BitVector()))
44839 EVT InVT = Src.getValueType();
44840 if (InVT.getVectorElementType().getSizeInBits() < 32)
44996 EVT InVT = Ops[0].getValueType();
44997 assert(InVT.getScalarType() == MVT::i8 &&
44999 assert(InVT == Ops[1].getValueType() && "Operands' types mismatch");
45001 InVT.getVectorNumElements() / 2);
45607 MVT InVT = In.getSimpleValueType();
45608 if (VT.getVectorNumElements() < InVT.getVectorNumElements() &&
45610 assert(InVT.is128BitVector() && "Expected 128-bit input vector");
45612 unsigned NumBits = InVT.getScalarSizeInBits() * VT.getVectorNumElements();
45618 DAG.getBitcast(InVT, VZLoad));
45636 MVT InVT = In.getSimpleValueType();
45637 if (VT.getVectorNumElements() < InVT.getVectorNumElements() &&
45639 assert(InVT.is128BitVector() && "Expected 128-bit input vector");
45641 unsigned NumBits = InVT.getScalarSizeInBits() * VT.getVectorNumElements();
45649 {N->getOperand(0), DAG.getBitcast(InVT, VZLoad)});
45653 DAG.getNode(N->getOpcode(), dl, VT, DAG.getBitcast(InVT, VZLoad));
46130 EVT InVT = N0.getValueType();
46159 if (InVT == MVT::i1 && N0.getOpcode() == ISD::XOR &&
46883 EVT InVT = Op0.getValueType();
46888 if (InVT.isVector() && InVT.getScalarSizeInBits() < 32) {
46891 InVT.getVectorNumElements());
46926 EVT InVT = Op0.getValueType();
46931 if (InVT.isVector() && InVT.getScalarSizeInBits() < 32) {
46934 InVT.getVectorNumElements());
46945 if (InVT.getScalarSizeInBits() > 32 && !Subtarget.hasDQI()) {
46946 unsigned BitWidth = InVT.getScalarSizeInBits();
46950 if (InVT.isVector())
46952 InVT.getVectorNumElements());
46963 assert(InVT == MVT::v2i64 && "Unexpected VT!");
46990 Op0.hasOneUse() && !Subtarget.is64Bit() && InVT == MVT::i64) {
46993 VT, InVT, SDLoc(N), Ld->getChain(), Ld->getBasePtr(),
47539 EVT InVT = Ops[0].getValueType();
47540 assert(InVT == Ops[1].getValueType() && "Operands' types mismatch");
47542 InVT.getVectorNumElements() / 2);
47585 EVT InVT = N00.getValueType();
47586 if (InVT.getVectorElementType() != MVT::i16 || N01.getValueType() != InVT ||
47587 N10.getValueType() != InVT || N11.getValueType() != InVT)