Lines Matching refs:Base
116 dbgs() << " Base.FrameIndex " << Base_FrameIndex << '\n';
215 bool selectAddr(SDNode *Parent, SDValue N, SDValue &Base,
219 SDValue ScaleOp, SDValue &Base, SDValue &Scale,
222 bool selectLEAAddr(SDValue N, SDValue &Base,
225 bool selectLEA64_32Addr(SDValue N, SDValue &Base,
228 bool selectTLSADDRAddr(SDValue N, SDValue &Base,
234 SDValue &Base, SDValue &Scale,
240 SDValue &Base, SDValue &Scale,
243 return tryFoldLoad(P, P, N, Base, Scale, Index, Disp, Segment);
247 SDValue &Base, SDValue &Scale,
261 MVT VT, SDValue &Base, SDValue &Scale,
265 Base = CurDAG->getTargetFrameIndex(
268 Base = AM.Base_Reg;
270 Base = CurDAG->getRegister(0, VT);
1606 // Base and index reg must be 0 in order to use %rip as base.
2399 SDValue &Base, SDValue &Scale,
2421 getAddressOperands(AM, DL, VT, Base, Scale, Index, Disp, Segment);
2432 bool X86DAGToDAGISel::selectAddr(SDNode *Parent, SDValue N, SDValue &Base,
2464 getAddressOperands(AM, DL, VT, Base, Scale, Index, Disp, Segment);
2493 bool X86DAGToDAGISel::selectLEA64_32Addr(SDValue N, SDValue &Base,
2499 if (!selectLEAAddr(N, Base, Scale, Index, Disp, Segment))
2502 RegisterSDNode *RN = dyn_cast<RegisterSDNode>(Base);
2504 Base = CurDAG->getRegister(0, MVT::i64);
2505 else if (Base.getValueType() == MVT::i32 && !isa<FrameIndexSDNode>(Base)) {
2506 // Base could already be %rip, particularly in the x32 ABI.
2509 Base = CurDAG->getTargetInsertSubreg(X86::sub_32bit, DL, MVT::i64, ImplDef,
2510 Base);
2531 SDValue &Base, SDValue &Scale,
2615 getAddressOperands(AM, DL, VT, Base, Scale, Index, Disp, Segment);
2620 bool X86DAGToDAGISel::selectTLSADDRAddr(SDValue N, SDValue &Base,
2637 getAddressOperands(AM, SDLoc(N), VT, Base, Scale, Index, Disp, Segment);
2679 SDValue &Base, SDValue &Scale,
2689 N.getOperand(1), Base, Scale, Index, Disp, Segment);
2693 SDValue &Base, SDValue &Scale,
2703 N.getOperand(1), Base, Scale, Index, Disp, Segment);
3079 SDValue Base, Scale, Index, Disp, Segment;
3080 if (!selectAddr(LoadNode, LoadNode->getBasePtr(), Base, Scale, Index, Disp,
3107 const SDValue Ops[] = {Base, Scale, Index, Disp, Segment, InputChain};
3124 const SDValue Ops[] = {Base, Scale, Index, Disp, Segment, InputChain};
3246 const SDValue Ops[] = {Base, Scale, Index, Disp,
3251 const SDValue Ops[] = {Base, Scale, Index, Disp,
4449 SDValue Base = Node->getOperand(3);
4457 SDValue Ops[] = { Base, Scale, Index, Disp, Segment, TReg, Chain };
4460 SDValue Ops[] = { TReg, Base, Scale, Index, Disp, Segment, Chain };
5489 SDValue Base, Scale, Index, Disp, Segment;
5491 Base, Scale, Index, Disp, Segment))
5501 SDValue Ops[] = {PassThru, Mask, Base, Scale,
5505 SDValue Ops[] = {PassThru, Base, Scale, Index,
5562 SDValue Base, Scale, Index, Disp, Segment;
5564 Base, Scale, Index, Disp, Segment))
5571 SDValue Ops[] = {Base, Scale, Index, Disp, Segment, Mask, Value, Chain};