Lines Matching defs:And
1355 SDValue And = N->getOperand(0);
1356 unsigned N0Opc = And.getMachineOpcode();
1361 And.getOperand(0),
1362 And.getOperand(1));
1378 SDValue Ops[] = { And.getOperand(1),
1379 And.getOperand(2),
1380 And.getOperand(3),
1381 And.getOperand(4),
1382 And.getOperand(5),
1383 And.getOperand(0),
1384 And.getOperand(6) /* Chain */ };
1388 Test, cast<MachineSDNode>(And.getNode())->memoperands());
1405 SDValue And = N->getOperand(0);
1406 unsigned N0Opc = And.getMachineOpcode();
1422 And.getOperand(0),
1423 And.getOperand(1));
1764 SDValue And = DAG.getNode(ISD::AND, DL, VT, Srl, NewMask);
1766 SDValue Shl = DAG.getNode(ISD::SHL, DL, VT, And, ShlCount);
1776 insertDAGNode(DAG, N, And);
1781 AM.IndexReg = And;
2130 SDValue And = N.getOperand(0);
2131 if (And.getOpcode() != ISD::AND) break;
2132 SDValue X = And.getOperand(0);
2138 !isa<ConstantSDNode>(And.getOperand(1)))
2140 uint64_t Mask = And.getConstantOperandVal(1) >> N.getConstantOperandVal(1);
3518 // And now 'or' these low 8 bits of shift amount into the 'control'.
3529 // And finally, form the BEXTR itself.
3581 // And RHS must be a mask.
4015 bool X86DAGToDAGISel::shrinkAndImmediate(SDNode *And) {
4018 MVT VT = And->getSimpleValueType(0);
4022 auto *And1C = dyn_cast<ConstantSDNode>(And->getOperand(1));
4042 SDValue And0 = And->getOperand(0);
4066 ReplaceNode(And, And0.getNode());
4071 SDValue NewMask = CurDAG->getConstant(NegMaskVal, SDLoc(And), VT);
4072 SDValue NewAnd = CurDAG->getNode(ISD::AND, SDLoc(And), VT, And0, NewMask);
4073 ReplaceNode(And, NewAnd.getNode());
4186 // And is computative.