Lines Matching refs:TII
101 const TargetInstrInfo *TII,
108 MI->setDesc(TII->get(WebAssembly::CONST_I32));
111 MI->setDesc(TII->get(WebAssembly::CONST_I64));
114 MI->setDesc(TII->get(WebAssembly::CONST_F32));
119 MI->setDesc(TII->get(WebAssembly::CONST_F64));
126 MI->setDesc(TII->get(WebAssembly::SPLAT_v4i32));
129 TII->get(WebAssembly::CONST_I32), TempReg)
264 const WebAssemblyInstrInfo *TII) {
265 return Def.isAsCheapAsAMove() && TII->isTriviallyReMaterializable(Def, &AA);
568 const WebAssemblyInstrInfo *TII, const WebAssemblyRegisterInfo *TRI) {
575 TII->reMaterialize(MBB, Insert, NewReg, 0, Def, *TRI);
635 MachineRegisterInfo &MRI, const WebAssemblyInstrInfo *TII) {
650 TII->get(getTeeOpcode(RegClass)), TeeReg)
774 const WebAssemblyInstrInfo *TII) {
779 TII->commuteInstruction(*Insert, /*NewMI=*/false, Operand0, Operand1);
785 if (TII->findCommutedOpIndices(*Insert, Operand0, Operand1)) {
787 TII->commuteInstruction(*Insert, /*NewMI=*/false, Operand0, Operand1);
812 const auto *TII = MF.getSubtarget<WebAssemblySubtarget>().getInstrInfo();
907 } else if (shouldRematerialize(*DefI, AA, TII)) {
910 LIS, MFI, MRI, TII, TRI);
914 MRI, TII);
919 Commuting.maybeCommute(Insert, TreeWalker, TII);
947 convertImplicitDefToConstZero(Insert, MRI, TII, MF, LIS);