Lines Matching refs:MCOperand
66 static MCOperand createVEMCOperand(VEMCExpr::VariantKind Kind, MCSymbol *Sym,
70 return MCOperand::createExpr(expr);
73 static MCOperand createGOTRelExprOp(VEMCExpr::VariantKind Kind,
77 return MCOperand::createExpr(expr);
80 static void emitSIC(MCStreamer &OutStreamer, MCOperand &RD,
88 static void emitBSIC(MCStreamer &OutStreamer, MCOperand &R1, MCOperand &R2,
94 MCOperand czero = MCOperand::createImm(0);
100 static void emitLEAzzi(MCStreamer &OutStreamer, MCOperand &Imm, MCOperand &RD,
105 MCOperand CZero = MCOperand::createImm(0);
112 static void emitLEASLzzi(MCStreamer &OutStreamer, MCOperand &Imm, MCOperand &RD,
117 MCOperand CZero = MCOperand::createImm(0);
124 static void emitLEAzii(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm,
125 MCOperand &RD, const MCSubtargetInfo &STI) {
129 MCOperand CZero = MCOperand::createImm(0);
136 static void emitLEASLrri(MCStreamer &OutStreamer, MCOperand &RS1,
137 MCOperand &RS2, MCOperand &Imm, MCOperand &RD,
148 static void emitBinary(MCStreamer &OutStreamer, unsigned Opcode, MCOperand &RS1,
149 MCOperand &Src2, MCOperand &RD,
159 static void emitANDrm(MCStreamer &OutStreamer, MCOperand &RS1, MCOperand &Imm,
160 MCOperand &RD, const MCSubtargetInfo &STI) {
166 MCOperand &RD, MCContext &OutContext,
169 MCOperand hi = createVEMCOperand(HiKind, GOTSym, OutContext);
170 MCOperand lo = createVEMCOperand(LoKind, GOTSym, OutContext);
172 MCOperand M032 = MCOperand::createImm(M0(32));
183 MCOperand MCRegOP = MCOperand::createReg(MO.getReg());
200 MCOperand RegGOT = MCOperand::createReg(VE::SX15); // GOT
201 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT
207 MCOperand cim24 = MCOperand::createImm(-24);
208 MCOperand loImm =
211 MCOperand M032 = MCOperand::createImm(M0(32));
214 MCOperand hiImm =
222 MCOperand MCRegOP = MCOperand::createReg(MO.getReg());
249 MCOperand RegPLT = MCOperand::createReg(VE::SX16); // PLT
255 MCOperand cim24 = MCOperand::createImm(-24);
256 MCOperand loImm =
259 MCOperand M032 = MCOperand::createImm(M0(32));
262 MCOperand hiImm =
290 MCOperand RegLR = MCOperand::createReg(VE::SX10); // LR
291 MCOperand RegS0 = MCOperand::createReg(VE::SX0); // S0
292 MCOperand RegS12 = MCOperand::createReg(VE::SX12); // S12
303 MCOperand cim24 = MCOperand::createImm(-24);
304 MCOperand loImm =
307 MCOperand M032 = MCOperand::createImm(M0(32));
310 MCOperand hiImm =
313 MCOperand ci8 = MCOperand::createImm(8);
314 MCOperand loImm2 =
318 MCOperand hiImm2 =