Lines Matching defs:CC
52 // The mask of CC values that Opcode can produce.
55 // The mask of CC values for which the original condition is true.
122 // such as SystemZ has with CC, so set this to the register-pressure
252 // We can use the CC result of compare-and-swap to implement
1784 // Return true if Op is an intrinsic node with chain that returns the CC value
1786 // the mask of valid CC values if so.
1812 // CC value as its final argument. Provide the associated SystemZISD
1813 // opcode and the mask of valid CC values if so.
1971 // Emit an intrinsic with chain and an explicit CC register result.
1982 assert(Op->getNumValues() == 2 && "Expected only CC result and chain");
1991 // Emit an intrinsic with an explicit CC register result.
2005 // CC is a comparison that will be implemented using an integer or
2010 static unsigned CCMaskForCondCode(ISD::CondCode CC) {
2016 switch (CC) {
2230 // negation to set CC, so avoiding separate LOAD AND TEST and
2280 // reuse CC.
2315 // instruction and whether the CC value is descriptive enough to handle
2319 // return the corresponding CC mask, otherwise return 0.
2518 // node Call against constant integer CC using comparison code Cond.
2522 SDValue Call, unsigned CCValid, uint64_t CC,
2528 // bit 3 for CC==0, bit 0 for CC==3, always false for CC>3.
2529 C.CCMask = CC < 4 ? 1 << (3 - CC) : 0;
2532 C.CCMask = CC < 4 ? ~(1 << (3 - CC)) : -1;
2534 // bits above bit 3 for CC==0 (always false), bits above bit 0 for CC==3,
2535 // always true for CC>3.
2536 C.CCMask = CC < 4 ? ~0U << (4 - CC) : -1;
2539 C.CCMask = CC < 4 ? ~(~0U << (4 - CC)) : 0;
2541 // bit 3 and above for CC==0, bit 0 and above for CC==3 (always true),
2542 // always true for CC>3.
2543 C.CCMask = CC < 4 ? ~0U << (3 - CC) : -1;
2546 C.CCMask = CC < 4 ? ~(~0U << (3 - CC)) : 0;
2676 // Return an i32 value that is 1 if the CC value produced by CCReg is
2677 // in the mask CCMask and 0 otherwise. CC is known to have a value
2688 // Return the SystemISD vector comparison operation for CC, or 0 if it cannot
2694 static unsigned getVectorComparison(ISD::CondCode CC, CmpMode Mode) {
2695 switch (CC) {
2740 // Return the SystemZISD vector comparison operation for CC or its inverse,
2742 // result is for the inverse of CC. Mode is as above.
2743 static unsigned getVectorComparisonOrInvert(ISD::CondCode CC, CmpMode Mode,
2745 if (unsigned Opcode = getVectorComparison(CC, Mode)) {
2750 CC = ISD::getSetCCInverse(CC, Mode == CmpMode::Int ? MVT::i32 : MVT::f32);
2751 if (unsigned Opcode = getVectorComparison(CC, Mode)) {
2811 // Lower a vector comparison of type CC between CmpOp0 and CmpOp1, producing
2817 ISD::CondCode CC,
2829 switch (CC) {
2868 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert))
2871 CC = ISD::getSetCCSwappedOperands(CC);
2872 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert))
2897 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(2))->get();
2901 return lowerVectorSETCC(DAG, DL, VT, CC, CmpOp0, CmpOp1);
2903 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL));
2914 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(3))->get();
2918 SDValue Res = lowerVectorSETCC(DAG, DL, VT, CC, CmpOp0, CmpOp1,
2923 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL, Chain, IsSignaling));
2932 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(1))->get();
2938 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL));
2974 ISD::CondCode CC = cast<CondCodeSDNode>(Op.getOperand(4))->get();
2977 Comparison C(getCmp(DAG, CmpOp0, CmpOp1, CC, DL));
3992 // still need to expand extracting the "success" result from the CC.
4135 assert(Op->getNumValues() == 2 && "Expected only CC result and chain");
4137 SDValue CC = getCCResult(DAG, SDValue(Node, 0));
4138 DAG.ReplaceAllUsesOfValueWith(SDValue(Op.getNode(), 0), CC);
4153 assert(Op->getNumValues() == 2 && "Expected a CC and non-CC result");
6486 // Compute the effective CC mask for the new branch or select.
6516 // Avoid introducing CC spills (because SRA would clobber CC).
6523 // Compute the effective CC mask for the new branch or select.
6585 // Optimize away GET_CCMASK (SELECT_CCMASK) if the CC masks are compatible
6830 // Intrinsic CC result is returned in the two low bits.
7036 // The CC operand of MI might be missing a kill marker because there
7037 // were multiple uses of CC, and ISel didn't know which to mark.
7040 // Scan forward through BB for a use/def of CC.
7044 if (mi.readsRegister(SystemZ::CC))
7046 if (mi.definesRegister(SystemZ::CC))
7050 // If we hit the end of the block, check whether CC is live into a
7054 if ((*SI)->isLiveIn(SystemZ::CC))
7157 "Bad CCValid operands since CC was not redefined.");
7165 if (NextMIIt->definesRegister(SystemZ::CC) ||
7186 (LastMI->killsRegister(SystemZ::CC) || checkCCKill(*LastMI, MBB));
7191 // Unless CC was killed in the last Select instruction, mark it as
7194 FalseMBB->addLiveIn(SystemZ::CC);
7195 JoinMBB->addLiveIn(SystemZ::CC);
7285 // Unless CC was killed in the CondStore instruction, mark it as
7287 if (!MI.killsRegister(SystemZ::CC) && !checkCCKill(MI, JoinMBB)) {
7288 FalseMBB->addLiveIn(SystemZ::CC);
7289 JoinMBB->addLiveIn(SystemZ::CC);
7670 // If the CC def wasn't dead in the ATOMIC_CMP_SWAPW, mark CC as live-in
7671 // to the block after the loop. At this point, CC may have been defined
7673 if (!MI.registerDefIsDead(SystemZ::CC))
7674 DoneMBB->addLiveIn(SystemZ::CC);
7860 // CC live-through into EndMBB, so add it as live-in.
7861 DoneMBB->addLiveIn(SystemZ::CC);
7912 MBB->addLiveIn(SystemZ::CC);
7920 // Opcode until CC != 3.
7973 DoneMBB->addLiveIn(SystemZ::CC);