Lines Matching refs:SDValue
59 SDValue Base;
61 SDValue Index;
120 RxSBGOperands(unsigned Op, SDValue N)
128 SDValue Input;
138 inline SDValue getImm(const SDNode *Node, uint64_t Imm) const {
155 bool selectAddress(SDValue N, SystemZAddressingMode &AM) const;
159 SDValue &Base, SDValue &Disp) const;
161 SDValue &Base, SDValue &Disp, SDValue &Index) const;
166 bool selectBDAddr(SystemZAddressingMode::DispRange DR, SDValue Addr,
167 SDValue &Base, SDValue &Disp) const;
172 bool selectMVIAddr(SystemZAddressingMode::DispRange DR, SDValue Addr,
173 SDValue &Base, SDValue &Disp) const;
179 SystemZAddressingMode::DispRange DR, SDValue Addr,
180 SDValue &Base, SDValue &Disp, SDValue &Index) const;
183 bool selectPCRelAddress(SDValue Addr, SDValue &Target) const {
192 bool selectBDAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp) const {
195 bool selectBDAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
198 bool selectBDAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp) const {
201 bool selectBDAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
206 bool selectMVIAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
209 bool selectMVIAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp) const {
214 bool selectBDXAddr12Only(SDValue Addr, SDValue &Base, SDValue &Disp,
215 SDValue &Index) const {
220 bool selectBDXAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
221 SDValue &Index) const {
226 bool selectDynAlloc12Only(SDValue Addr, SDValue &Base, SDValue &Disp,
227 SDValue &Index) const {
232 bool selectBDXAddr20Only(SDValue Addr, SDValue &Base, SDValue &Disp,
233 SDValue &Index) const {
238 bool selectBDXAddr20Only128(SDValue Addr, SDValue &Base, SDValue &Disp,
239 SDValue &Index) const {
244 bool selectBDXAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
245 SDValue &Index) const {
250 bool selectLAAddr12Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
251 SDValue &Index) const {
256 bool selectLAAddr20Pair(SDValue Addr, SDValue &Base, SDValue &Disp,
257 SDValue &Index) const {
267 bool selectBDVAddr12Only(SDValue Addr, SDValue Elem, SDValue &Base,
268 SDValue &Disp, SDValue &Index) const;
273 bool detectOrAndInsertion(SDValue &Op, uint64_t InsertMask) const;
284 SDValue getUNDEF(const SDLoc &DL, EVT VT) const;
287 SDValue convertTo(const SDLoc &DL, EVT VT, SDValue N) const;
304 void splitLargeImmediate(unsigned Opcode, SDNode *Node, SDValue Op0,
342 SDValue expandSelectBoolean(SDNode *Node);
368 bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
369 std::vector<SDValue> &OutOps) override;
370 bool IsProfitableToFold(SDValue N, SDNode *U, SDNode *Root) const override;
405 SDValue Value) {
416 SDValue Value) {
427 static bool expandIndex(SystemZAddressingMode &AM, SDValue Base,
428 SDValue Index) {
440 SDValue Op0, uint64_t Op1) {
456 SDValue N = IsBase ? AM.Base : AM.Index;
463 SDValue Op0 = N.getOperand(0);
464 SDValue Op1 = N.getOperand(1);
485 SDValue Full = N.getOperand(0);
486 SDValue Base = N.getOperand(1);
487 SDValue Anchor = Base.getOperand(0);
569 bool SystemZDAGToDAGISel::selectAddress(SDValue Addr,
577 expandDisp(AM, true, SDValue(),
582 expandAdjDynAlloc(AM, true, SDValue()))
612 static void insertDAGNode(SelectionDAG *DAG, SDNode *Pos, SDValue N) {
627 EVT VT, SDValue &Base,
628 SDValue &Disp) const {
642 SDValue Trunc = CurDAG->getNode(ISD::TRUNCATE, DL, VT, Base);
652 EVT VT, SDValue &Base,
653 SDValue &Disp,
654 SDValue &Index) const {
664 SDValue Addr, SDValue &Base,
665 SDValue &Disp) const {
675 SDValue Addr, SDValue &Base,
676 SDValue &Disp) const {
687 SDValue Addr, SDValue &Base,
688 SDValue &Disp, SDValue &Index) const {
697 bool SystemZDAGToDAGISel::selectBDVAddr12Only(SDValue Addr, SDValue Elem,
698 SDValue &Base,
699 SDValue &Disp,
700 SDValue &Index) const {
701 SDValue Regs[2];
721 bool SystemZDAGToDAGISel::detectOrAndInsertion(SDValue &Op,
773 SDValue N = RxSBG.Input;
794 SDValue Input = N.getOperand(0);
817 SDValue Input = N.getOperand(0);
938 SDValue SystemZDAGToDAGISel::getUNDEF(const SDLoc &DL, EVT VT) const {
940 return SDValue(N, 0);
943 SDValue SystemZDAGToDAGISel::convertTo(const SDLoc &DL, EVT VT,
944 SDValue N) const {
959 RxSBGOperands RISBG(SystemZ::RISBG, SDValue(N, 0));
1006 SDValue In = convertTo(DL, VT, RISBG.Input);
1007 SDValue Mask = CurDAG->getConstant(RISBG.Mask, DL, VT);
1008 SDValue New = CurDAG->getNode(ISD::AND, DL, VT, In, Mask);
1041 SDValue Ops[5] = {
1048 SDValue New = convertTo(
1049 DL, VT, SDValue(CurDAG->getMachineNode(Opcode, DL, OpcodeVT, Ops), 0));
1081 SDValue Op0 = N->getOperand(I ^ 1);
1098 SDValue Ops[5] = {
1105 SDValue New = convertTo(
1106 DL, VT, SDValue(CurDAG->getMachineNode(Opcode, DL, MVT::i64, Ops), 0));
1112 SDValue Op0, uint64_t UpperVal,
1116 SDValue Upper = CurDAG->getConstant(UpperVal, DL, VT);
1138 SDValue Lower = CurDAG->getConstant(LowerVal, DL, VT);
1139 SDValue Or = CurDAG->getNode(Opcode, DL, VT, Upper, Lower);
1155 SmallVector<SDValue, 2> Ops;
1158 SDValue Op = CurDAG->getNode(VCI.Opcode, DL, VCI.VecVT, Ops);
1163 SDValue BitCast = CurDAG->getNode(ISD::BITCAST, DL, VT, Op);
1176 SDValue ElemV = N->getOperand(2);
1193 SDValue Base, Disp, Index;
1199 SDValue Ops[] = {
1204 ReplaceUses(SDValue(Load, 1), SDValue(Res, 1));
1210 SDValue Value = Store->getValue();
1216 SDValue ElemV = Value.getOperand(1);
1221 SDValue Vec = Value.getOperand(0);
1227 SDValue Base, Disp, Index;
1233 SDValue Ops[] = {
1244 SDValue StoredVal, SelectionDAG *CurDAG,
1246 SDValue &InputChain) {
1259 SDValue Load = StoredVal->getOperand(0);
1278 SDValue Chain = StoreNode->getChain();
1285 SmallVector<SDValue, 4> ChainOps;
1290 SDValue Op = Chain.getOperand(i);
1303 for (SDValue Op : StoredVal->ops())
1334 SDValue StoredVal = StoreNode->getOperand(1);
1372 SDValue InputChain;
1377 SDValue Operand = StoredVal.getOperand(1);
1388 SDValue Base, Disp;
1392 SDValue Ops[] = { Base, Disp, Operand, InputChain };
1398 ReplaceUses(SDValue(StoreNode, 0), SDValue(Result, 1));
1399 ReplaceUses(SDValue(StoredVal.getNode(), 1), SDValue(Result, 0));
1537 splitLargeImmediate(ISD::OR, Node, SDValue(), Val - uint32_t(Val),
1545 SDValue Op0 = Node->getOperand(0);
1546 SDValue Op1 = Node->getOperand(1);
1556 SDValue CCValid = Node->getOperand(2);
1557 SDValue CCMask = Node->getOperand(3);
1565 SDValue Op4 = Node->getOperand(4);
1631 SelectInlineAsmMemoryOperand(const SDValue &Op,
1633 std::vector<SDValue> &OutOps) {
1636 SDValue Base, Disp, Index;
1673 SDValue RC = CurDAG->getTargetConstant(TRC->getID(), DL, MVT::i32);
1680 SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
1688 SDValue(CurDAG->getMachineNode(TargetOpcode::COPY_TO_REGCLASS,
1705 SystemZDAGToDAGISel::IsProfitableToFold(SDValue N, SDNode *U,
1828 SDValue SystemZDAGToDAGISel::expandSelectBoolean(SDNode *Node) {
1832 return SDValue();
1834 return SDValue();
1836 return SDValue();
1841 return SDValue();
1846 SDValue CCReg = Node->getOperand(4);
1848 SDValue Result = CurDAG->getNode(SystemZISD::IPM, DL, MVT::i32, CCReg);
1902 SDValue Res;
1917 CurDAG->ReplaceAllUsesOfValueWith(SDValue(N, 0), Res);