Lines Matching refs:SP
117 (MI->getOpcode() == SP::RESTORErr
118 || MI->getOpcode() == SP::RESTOREri)) {
126 (MI->getOpcode() == SP::FCMPS || MI->getOpcode() == SP::FCMPD
127 || MI->getOpcode() == SP::FCMPQ)) {
128 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
146 BuildMI(MBB, I, MI->getDebugLoc(), TII->get(SP::NOP));
156 TII->get(SP::UNIMP)).addImm(structSize);
178 if (slot->getOpcode() == SP::RET || slot->getOpcode() == SP::TLS_CALL)
181 if (slot->getOpcode() == SP::RETL) {
185 if (J->getOpcode() == SP::RESTORErr
186 || J->getOpcode() == SP::RESTOREri) {
188 slot->setDesc(Subtarget->getInstrInfo()->get(SP::RET));
275 Opcode >= SP::LDDArr && Opcode <= SP::LDrr)
281 Opcode >= SP::FDIVD && Opcode <= SP::FSQRTD)
294 RegDefs.insert(SP::O7);
298 case SP::CALL: break;
299 case SP::CALLrr:
300 case SP::CALLri:
335 if (MO.isImplicit() && MI->getOpcode() == SP::RETL)
361 case SP::CALL: structSizeOpNum = 1; break;
362 case SP::CALLrr:
363 case SP::CALLri: structSizeOpNum = 2; break;
364 case SP::TLS_CALL: return false;
384 if (reg < SP::I0 || reg > SP::I7)
391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr)
392 ? SP::RESTORErr
393 : SP::RESTOREri));
396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
412 if (reg < SP::I0 || reg > SP::I7)
416 if (OrMI->getOpcode() == SP::ORrr
417 && OrMI->getOperand(1).getReg() != SP::G0
418 && OrMI->getOperand(2).getReg() != SP::G0)
421 if (OrMI->getOpcode() == SP::ORri
422 && OrMI->getOperand(1).getReg() != SP::G0
430 OrMI->setDesc(TII->get((OrMI->getOpcode() == SP::ORrr)
431 ? SP::RESTORErr
432 : SP::RESTOREri));
435 OrMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
450 if (reg < SP::I0 || reg > SP::I7)
465 assert(RestoreMI->getOpcode() == SP::RESTORErr);
467 RestoreMI->setDesc(TII->get(SP::RESTOREri));
469 RestoreMI->getOperand(0).setReg(reg - SP::I0 + SP::O0);
470 RestoreMI->getOperand(1).setReg(SP::G0);
488 assert(MBBI->getOpcode() == SP::RESTORErr
489 && MBBI->getOperand(0).getReg() == SP::G0
490 && MBBI->getOperand(1).getReg() == SP::G0
491 && MBBI->getOperand(2).getReg() == SP::G0);
503 case SP::ADDrr:
504 case SP::ADDri: return combineRestoreADD(MBBI, PrevInst, TII); break;
505 case SP::ORrr:
506 case SP::ORri: return combineRestoreOR(MBBI, PrevInst, TII); break;
507 case SP::SETHIi: return combineRestoreSETHIi(MBBI, PrevInst, TII); break;