Lines Matching refs:SDValue
352 bool RISCVTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
389 static void normaliseSetCC(SDValue &LHS, SDValue &RHS, ISD::CondCode &CC) {
425 SDValue RISCVTargetLowering::LowerOperation(SDValue Op,
456 SDValue Op0 = Op.getOperand(0);
458 return SDValue();
459 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, Op0);
460 SDValue FPConv = DAG.getNode(RISCVISD::FMV_W_X_RV64, DL, MVT::f32, NewOp0);
468 static SDValue getTargetNode(GlobalAddressSDNode *N, SDLoc DL, EVT Ty,
473 static SDValue getTargetNode(BlockAddressSDNode *N, SDLoc DL, EVT Ty,
479 static SDValue getTargetNode(ConstantPoolSDNode *N, SDLoc DL, EVT Ty,
486 SDValue RISCVTargetLowering::getAddr(NodeTy *N, SelectionDAG &DAG,
492 SDValue Addr = getTargetNode(N, DL, Ty, DAG, 0);
497 return SDValue(DAG.getMachineNode(RISCV::PseudoLLA, DL, Ty, Addr), 0);
502 return SDValue(DAG.getMachineNode(RISCV::PseudoLA, DL, Ty, Addr), 0);
511 SDValue AddrHi = getTargetNode(N, DL, Ty, DAG, RISCVII::MO_HI);
512 SDValue AddrLo = getTargetNode(N, DL, Ty, DAG, RISCVII::MO_LO);
513 SDValue MNHi = SDValue(DAG.getMachineNode(RISCV::LUI, DL, Ty, AddrHi), 0);
514 return SDValue(DAG.getMachineNode(RISCV::ADDI, DL, Ty, MNHi, AddrLo), 0);
520 SDValue Addr = getTargetNode(N, DL, Ty, DAG, 0);
521 return SDValue(DAG.getMachineNode(RISCV::PseudoLLA, DL, Ty, Addr), 0);
526 SDValue RISCVTargetLowering::lowerGlobalAddress(SDValue Op,
536 SDValue Addr = getAddr(N, DAG, IsLocal);
548 SDValue RISCVTargetLowering::lowerBlockAddress(SDValue Op,
555 SDValue RISCVTargetLowering::lowerConstantPool(SDValue Op,
562 SDValue RISCVTargetLowering::getStaticTLSAddr(GlobalAddressSDNode *N,
575 SDValue Addr = DAG.getTargetGlobalAddress(GV, DL, Ty, 0, 0);
576 SDValue Load =
577 SDValue(DAG.getMachineNode(RISCV::PseudoLA_TLS_IE, DL, Ty, Addr), 0);
580 SDValue TPReg = DAG.getRegister(RISCV::X4, XLenVT);
588 SDValue AddrHi =
590 SDValue AddrAdd =
592 SDValue AddrLo =
595 SDValue MNHi = SDValue(DAG.getMachineNode(RISCV::LUI, DL, Ty, AddrHi), 0);
596 SDValue TPReg = DAG.getRegister(RISCV::X4, XLenVT);
597 SDValue MNAdd = SDValue(
600 return SDValue(DAG.getMachineNode(RISCV::ADDI, DL, Ty, MNAdd, AddrLo), 0);
603 SDValue RISCVTargetLowering::getDynamicTLSAddr(GlobalAddressSDNode *N,
613 SDValue Addr = DAG.getTargetGlobalAddress(GV, DL, Ty, 0, 0);
614 SDValue Load =
615 SDValue(DAG.getMachineNode(RISCV::PseudoLA_TLS_GD, DL, Ty, Addr), 0);
635 SDValue RISCVTargetLowering::lowerGlobalTLSAddress(SDValue Op,
645 SDValue Addr;
669 SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
670 SDValue CondV = Op.getOperand(0);
671 SDValue TrueV = Op.getOperand(1);
672 SDValue FalseV = Op.getOperand(2);
684 SDValue LHS = CondV.getOperand(0);
685 SDValue RHS = CondV.getOperand(1);
691 SDValue TargetCC = DAG.getConstant(CCVal, DL, XLenVT);
693 SDValue Ops[] = {LHS, RHS, TargetCC, TrueV, FalseV};
700 SDValue Zero = DAG.getConstant(0, DL, XLenVT);
701 SDValue SetNE = DAG.getConstant(ISD::SETNE, DL, XLenVT);
704 SDValue Ops[] = {CondV, Zero, SetNE, TrueV, FalseV};
709 SDValue RISCVTargetLowering::lowerVASTART(SDValue Op, SelectionDAG &DAG) const {
714 SDValue FI = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
724 SDValue RISCVTargetLowering::lowerFRAMEADDR(SDValue Op,
735 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), DL, FrameReg, VT);
739 SDValue Ptr = DAG.getNode(ISD::ADD, DL, VT, FrameAddr,
747 SDValue RISCVTargetLowering::lowerRETURNADDR(SDValue Op,
757 return SDValue();
764 SDValue FrameAddr = lowerFRAMEADDR(Op, DAG);
765 SDValue Offset = DAG.getConstant(Off, DL, VT);
777 SDValue RISCVTargetLowering::lowerShiftLeftParts(SDValue Op,
780 SDValue Lo = Op.getOperand(0);
781 SDValue Hi = Op.getOperand(1);
782 SDValue Shamt = Op.getOperand(2);
792 SDValue Zero = DAG.getConstant(0, DL, VT);
793 SDValue One = DAG.getConstant(1, DL, VT);
794 SDValue MinusXLen = DAG.getConstant(-(int)Subtarget.getXLen(), DL, VT);
795 SDValue XLenMinus1 = DAG.getConstant(Subtarget.getXLen() - 1, DL, VT);
796 SDValue ShamtMinusXLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusXLen);
797 SDValue XLenMinus1Shamt = DAG.getNode(ISD::SUB, DL, VT, XLenMinus1, Shamt);
799 SDValue LoTrue = DAG.getNode(ISD::SHL, DL, VT, Lo, Shamt);
800 SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, VT, Lo, One);
801 SDValue ShiftRightLo =
803 SDValue ShiftLeftHi = DAG.getNode(ISD::SHL, DL, VT, Hi, Shamt);
804 SDValue HiTrue = DAG.getNode(ISD::OR, DL, VT, ShiftLeftHi, ShiftRightLo);
805 SDValue HiFalse = DAG.getNode(ISD::SHL, DL, VT, Lo, ShamtMinusXLen);
807 SDValue CC = DAG.getSetCC(DL, VT, ShamtMinusXLen, Zero, ISD::SETLT);
812 SDValue Parts[2] = {Lo, Hi};
816 SDValue RISCVTargetLowering::lowerShiftRightParts(SDValue Op, SelectionDAG &DAG,
819 SDValue Lo = Op.getOperand(0);
820 SDValue Hi = Op.getOperand(1);
821 SDValue Shamt = Op.getOperand(2);
842 SDValue Zero = DAG.getConstant(0, DL, VT);
843 SDValue One = DAG.getConstant(1, DL, VT);
844 SDValue MinusXLen = DAG.getConstant(-(int)Subtarget.getXLen(), DL, VT);
845 SDValue XLenMinus1 = DAG.getConstant(Subtarget.getXLen() - 1, DL, VT);
846 SDValue ShamtMinusXLen = DAG.getNode(ISD::ADD, DL, VT, Shamt, MinusXLen);
847 SDValue XLenMinus1Shamt = DAG.getNode(ISD::SUB, DL, VT, XLenMinus1, Shamt);
849 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, VT, Lo, Shamt);
850 SDValue ShiftLeftHi1 = DAG.getNode(ISD::SHL, DL, VT, Hi, One);
851 SDValue ShiftLeftHi =
853 SDValue LoTrue = DAG.getNode(ISD::OR, DL, VT, ShiftRightLo, ShiftLeftHi);
854 SDValue HiTrue = DAG.getNode(ShiftRightOp, DL, VT, Hi, Shamt);
855 SDValue LoFalse = DAG.getNode(ShiftRightOp, DL, VT, Hi, ShamtMinusXLen);
856 SDValue HiFalse =
859 SDValue CC = DAG.getSetCC(DL, VT, ShamtMinusXLen, Zero, ISD::SETLT);
864 SDValue Parts[2] = {Lo, Hi};
868 SDValue RISCVTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
874 return SDValue(); // Don't custom lower most intrinsics.
908 static SDValue customLegalizeToWOp(SDNode *N, SelectionDAG &DAG) {
911 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(0));
912 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
913 SDValue NewRes = DAG.getNode(WOpcode, DL, MVT::i64, NewOp0, NewOp1);
920 static SDValue customLegalizeToWOpWithSExt(SDNode *N, SelectionDAG &DAG) {
922 SDValue NewOp0 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(0));
923 SDValue NewOp1 = DAG.getNode(ISD::ANY_EXTEND, DL, MVT::i64, N->getOperand(1));
924 SDValue NewWOp = DAG.getNode(N->getOpcode(), DL, MVT::i64, NewOp0, NewOp1);
925 SDValue NewRes = DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, MVT::i64, NewWOp,
931 SmallVectorImpl<SDValue> &Results,
944 SDValue Op0 = IsStrict ? N->getOperand(1) : N->getOperand(0);
954 SDValue Chain = IsStrict ? N->getOperand(0) : SDValue();
955 SDValue Result;
968 SDValue RCW =
1008 SDValue Op0 = N->getOperand(0);
1011 SDValue FPConv =
1019 SDValue RISCVTargetLowering::PerformDAGCombine(SDNode *N,
1027 SDValue Op0 = N->getOperand(0);
1040 SDValue Lo = DAG.getConstant(V.trunc(32), DL, MVT::i32);
1041 SDValue Hi = DAG.getConstant(V.lshr(32).trunc(32), DL, MVT::i32);
1052 SDValue NewSplitF64 =
1055 SDValue Lo = NewSplitF64.getValue(0);
1056 SDValue Hi = NewSplitF64.getValue(1);
1059 SDValue NewHi = DAG.getNode(ISD::XOR, DL, MVT::i32, Hi,
1064 SDValue NewHi = DAG.getNode(ISD::AND, DL, MVT::i32, Hi,
1072 SDValue LHS = N->getOperand(0);
1073 SDValue RHS = N->getOperand(1);
1078 return SDValue();
1083 SDValue Op0 = N->getOperand(0);
1088 SDValue AExtOp =
1100 SDValue NewFMV = DAG.getNode(RISCVISD::FMV_X_ANYEXTW_RV64, DL, MVT::i64,
1115 return SDValue();
1125 SDValue N0 = N->getOperand(0);
1165 SDValue Op, const APInt &DemandedElts, const SelectionDAG &DAG,
1765 static SDValue convertLocVTToValVT(SelectionDAG &DAG, SDValue Val,
1785 static SDValue unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain,
1790 SDValue Val;
1818 static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val,
1840 static SDValue unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain,
1849 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
1850 SDValue Val;
1868 static SDValue unpackF64OnRV32DSoftABI(SelectionDAG &DAG, SDValue Chain,
1879 SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
1888 SDValue Lo = DAG.getCopyFromReg(Chain, DL, LoVReg, MVT::i32);
1889 SDValue Hi;
1893 SDValue FIN = DAG.getFrameIndex(FI, MVT::i32);
1963 SDValue RISCVTargetLowering::LowerFormalArguments(
1964 SDValue Chain, CallingConv::ID CallConv, bool IsVarArg,
1966 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
1996 std::vector<SDValue> OutChains;
2009 SDValue ArgValue;
2030 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue,
2083 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, XLenVT);
2085 SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));
2086 SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff,
2181 SDValue RISCVTargetLowering::LowerCall(CallLoweringInfo &CLI,
2182 SmallVectorImpl<SDValue> &InVals) const {
2186 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
2188 SDValue Chain = CLI.Chain;
2189 SDValue Callee = CLI.Callee;
2221 SmallVector<SDValue, 8> ByValArgs;
2227 SDValue Arg = OutVals[i];
2233 SDValue FIPtr = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout()));
2234 SDValue SizeNode = DAG.getConstant(Size, DL, XLenVT);
2247 SmallVector<std::pair<Register, SDValue>, 8> RegsToPass;
2248 SmallVector<SDValue, 8> MemOpChains;
2249 SDValue StackPtr;
2252 SDValue ArgValue = OutVals[i];
2259 SDValue SplitF64 = DAG.getNode(
2261 SDValue Lo = SplitF64.getValue(0);
2262 SDValue Hi = SplitF64.getValue(1);
2291 SDValue SpillSlot = DAG.CreateStackTemporary(Outs[i].ArgVT);
2301 SDValue PartValue = OutVals[i + 1];
2303 SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, SpillSlot,
2330 SDValue Address =
2344 SDValue Glue;
2384 SmallVector<SDValue, 8> Ops;
2432 SDValue RetValue =
2440 SDValue RetValue2 =
2472 SDValue
2473 RISCVTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
2476 const SmallVectorImpl<SDValue> &OutVals,
2491 SDValue Glue;
2492 SmallVector<SDValue, 4> RetOps(1, Chain);
2496 SDValue Val = OutVals[i];
2503 SDValue SplitF64 = DAG.getNode(RISCVISD::SplitF64, DL,
2505 SDValue Lo = SplitF64.getValue(0);
2506 SDValue Hi = SplitF64.getValue(1);
2572 const SmallVectorImpl<std::pair<llvm::Register, llvm::SDValue>> &Regs,
2783 SDValue Op, std::string &Constraint, std::vector<SDValue> &Ops,
2998 SDValue C) const {