Lines Matching refs:DefMI
156 const MachineInstr &DefMI, unsigned DefIdx,
159 int Latency = PPCGenInstrInfo::getOperandLatency(ItinData, DefMI, DefIdx,
162 if (!DefMI.getParent())
165 const MachineOperand &DefMO = DefMI.getOperand(DefIdx);
171 &DefMI.getParent()->getParent()->getRegInfo();
181 Latency = getInstrLatency(ItinData, DefMI);
1561 bool PPCInstrInfo::onlyFoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
1564 unsigned DefOpc = DefMI.getOpcode();
1567 if (!DefMI.getOperand(1).isImm())
1569 if (DefMI.getOperand(1).getImm() != 0)
1628 bool PPCInstrInfo::FoldImmediate(MachineInstr &UseMI, MachineInstr &DefMI,
1630 bool Changed = onlyFoldImmediate(UseMI, DefMI, Reg);
1632 DefMI.eraseFromParent();
2562 MachineInstr *DefMI = nullptr;
2577 DefMI = MRI->getVRegDef(TrueReg);
2578 if (DefMI->getOpcode() == PPC::LI || DefMI->getOpcode() == PPC::LI8 ||
2579 DefMI->getOpcode() == PPC::ADDI ||
2580 DefMI->getOpcode() == PPC::ADDI8) {
2584 // and is more possible to be converted. So if current DefMI is
2586 if (DefMI->getOpcode() == PPC::LI || DefMI->getOpcode() == PPC::LI8)
2622 MachineInstr *DefMI = getDefMIPostRA(Reg, MI, SeenIntermediateUse);
2623 if (DefMI) {
2626 switch (DefMI->getOpcode()) {
2635 return DefMI;
2641 return OpNoForForwarding == ~0U ? nullptr : DefMI;
2991 MachineInstr *DefMI = getForwardingDefMI(MI, ForwardingOperand,
2993 if (!DefMI)
3000 *KilledDef = DefMI;
3006 transformToNewImmFormFedByAdd(MI, *DefMI, ForwardingOperand))
3018 transformToImmFormFedByAdd(MI, III, ForwardingOperand, *DefMI,
3025 transformToImmFormFedByLI(MI, III, ForwardingOperand, *DefMI))
3028 // If this is not a reg+reg, but the DefMI is LI/LI8, check if its user MI
3030 if (!HasImmForm && simplifyToLI(MI, *DefMI, ForwardingOperand, KilledDef))
3534 // Check if the DefMI is the add inst and set the ImmMO and RegMO
3536 bool PPCInstrInfo::isDefMIElgibleForForwarding(MachineInstr &DefMI,
3540 unsigned Opc = DefMI.getOpcode();
3544 assert(DefMI.getNumOperands() >= 3 &&
3546 RegMO = &DefMI.getOperand(1);
3547 ImmMO = &DefMI.getOperand(2);
3553 // This DefMI is elgible for forwarding if it is:
3560 const MachineOperand &RegMO, const MachineInstr &DefMI,
3575 // Walking the inst in reverse(MI-->DefMI) to get the last DEF of the Reg.
3580 if (It->modifiesRegister(Reg, &getRegisterInfo()) && (&*It) != &DefMI)
3582 else if (It->killsRegister(Reg, &getRegisterInfo()) && (&*It) != &DefMI)
3584 // Made it to DefMI without encountering a clobber.
3585 if ((&*It) == &DefMI)
3588 assert((&*It) == &DefMI && "DefMI is missing");
3590 // If DefMI also defines the register to be forwarded, we can only forward it
3591 // if DefMI is being erased.
3592 if (DefMI.modifiesRegister(Reg, &getRegisterInfo()))
3599 const MachineInstr &DefMI,
3604 if (DefMI.getOpcode() == PPC::ADDItocL) {
3628 // DefMI may be folded with another imm form instruction, the result Imm is
3629 // the sum of Imm of DefMI and BaseImm which is from imm form instruction.
3654 bool PPCInstrInfo::simplifyToLI(MachineInstr &MI, MachineInstr &DefMI,
3657 if ((DefMI.getOpcode() != PPC::LI && DefMI.getOpcode() != PPC::LI8) ||
3658 !DefMI.getOperand(1).isImm())
3665 int64_t Immediate = DefMI.getOperand(1).getImm();
3725 LLVM_DEBUG(DefMI.dump(); MI.dump(); CompareUseMI.dump());
3840 if (MRI->hasOneUse(DefMI.getOperand(0).getReg()))
3841 DefMI.getOperand(1).setImm(NewImm);
3858 LLVM_DEBUG(DefMI.dump());
3874 fixupIsDeadOrKill(&DefMI, &MI, ForwardingOperandReg);
3884 MachineInstr &MI, MachineInstr &DefMI, unsigned OpNoForForwarding) const {
3920 // Check DefMI.
3923 if (!isDefMIElgibleForForwarding(DefMI, III, ImmMO, RegMO))
3932 if (!isImmElgibleForForwarding(*ImmMO, DefMI, III, Imm, ImmBase))
3944 LLVM_DEBUG(DefMI.dump());
3950 // FIXME: fix kill/dead flag if MI and DefMI are not in same basic block.
3951 if (DefMI.getParent() == MI.getParent()) {
3952 // Check if reg is killed between MI and DefMI.
3955 MachineBasicBlock::const_reverse_iterator E = DefMI;
3966 fixupIsDeadOrKill(&DefMI, &MI, RegMO->getReg());
3968 fixupIsDeadOrKill(&DefMI, &MI, ForwardKilledOperandReg);
3982 MachineInstr &DefMI, bool KillDefMI) const {
3985 // x = addi reg, imm <----- DefMI
3993 // Check if the DefMI meet the requirement
3997 if (!isDefMIElgibleForForwarding(DefMI, III, ImmMO, RegMO))
4004 if (!isImmElgibleForForwarding(*ImmMO, DefMI, III, Imm))
4009 if (!isRegElgibleForForwarding(*RegMO, DefMI, MI, KillDefMI,
4020 // We know that, the MI and DefMI both meet the pattern, and
4026 LLVM_DEBUG(DefMI.dump());
4045 if (DefMI.getOpcode() == PPC::ADDItocL)
4079 fixupIsDeadOrKill(&DefMI, &MI, RegMO->getReg());
4084 fixupIsDeadOrKill(&DefMI, &MI, ForwardKilledOperandReg);
4095 MachineInstr &DefMI) const {
4096 // DefMI must be LI or LI8.
4097 if ((DefMI.getOpcode() != PPC::LI && DefMI.getOpcode() != PPC::LI8) ||
4098 !DefMI.getOperand(1).isImm())
4102 int64_t Imm = SignExtend64<16>(DefMI.getOperand(1).getImm());
4240 fixupIsDeadOrKill(&DefMI, &MI, ForwardKilledOperandReg);