Lines Matching refs:ISD
41 // STBRX = ISD::FIRST_TARGET_MEMORY_OPCODE
44 // the ISD::FIRST_TARGET_MEMORY_OPCODE while a LOAD or STORE should come
48 FIRST_NUMBER = ISD::BUILTIN_OP_END,
459 STBRX = ISD::FIRST_TARGET_MEMORY_OPCODE,
705 /// getSetCCResultType - Return the ISD::SETCC ValueType
719 ISD::MemIndexedMode &AM,
902 if (Opc != ISD::LOAD && Opc != ISD::STORE)
1052 ISD::LoadExtType ET = ISD::NON_EXTLOAD) const;
1077 const SmallVectorImpl<ISD::InputArg> &Ins,
1082 bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs,
1083 const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG &DAG) const;
1140 const SmallVectorImpl<ISD::InputArg> &Ins,
1148 const SmallVectorImpl<ISD::InputArg> &Ins,
1154 const SmallVectorImpl<ISD::InputArg> &Ins,
1163 const SmallVectorImpl<ISD::OutputArg> &Outs,
1167 const SmallVectorImpl<ISD::OutputArg> &Outs,
1171 SDValue extendArgForPPC64(ISD::ArgFlagsTy Flags, EVT ObjectVT,
1177 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1181 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1185 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1189 const SmallVectorImpl<ISD::InputArg> &Ins, const SDLoc &dl,
1194 ISD::ArgFlagsTy Flags, SelectionDAG &DAG,
1198 const SmallVectorImpl<ISD::OutputArg> &Outs,
1200 const SmallVectorImpl<ISD::InputArg> &Ins,
1205 const SmallVectorImpl<ISD::OutputArg> &Outs,
1207 const SmallVectorImpl<ISD::InputArg> &Ins,
1212 const SmallVectorImpl<ISD::OutputArg> &Outs,
1214 const SmallVectorImpl<ISD::InputArg> &Ins,
1219 const SmallVectorImpl<ISD::OutputArg> &Outs,
1221 const SmallVectorImpl<ISD::InputArg> &Ins,