Lines Matching refs:ValVT
3705 EVT ValVT = VA.getValVT();
3707 switch (ValVT.getSimpleVT().SimpleTy) {
3709 llvm_unreachable("ValVT not supported by formal arguments Lowering");
3767 ValVT == MVT::i1 ? MVT::i32 : ValVT);
3768 if (ValVT == MVT::i1)
7045 static bool CC_AIX(unsigned ValNo, MVT ValVT, MVT LocVT,
7055 assert((!ValVT.isInteger() ||
7056 (ValVT.getSizeInBits() <= RegVT.getSizeInBits())) &&
7059 if (ValVT == MVT::f128)
7065 if (ValVT.isVector() || LocVT.isVector())
7096 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, RegVT, LocInfo));
7108 switch (ValVT.SimpleTy) {
7119 if (ValVT.getSizeInBits() < RegVT.getSizeInBits())
7123 State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, RegVT, LocInfo));
7125 State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset, RegVT, LocInfo));
7139 State.addLoc(CCValAssign::getReg(ValNo, ValVT, FReg, LocVT, LocInfo));
7151 CCValAssign::getCustomReg(ValNo, ValVT, Reg, RegVT, LocInfo));
7161 FReg ? CCValAssign::getCustomMem(ValNo, ValVT, Offset, LocVT,
7163 : CCValAssign::getMem(ValNo, ValVT, Offset, LocVT, LocInfo));
7193 static SDValue truncateScalarIntegerArg(ISD::ArgFlagsTy Flags, EVT ValVT,
7196 assert(ValVT.isScalarInteger() && LocVT.isScalarInteger());
7197 assert(ValVT.getSizeInBits() < LocVT.getSizeInBits());
7201 DAG.getValueType(ValVT));
7204 DAG.getValueType(ValVT));
7206 return DAG.getNode(ISD::TRUNCATE, dl, ValVT, ArgValue);
7395 EVT ValVT = VA.getValVT();
7397 MVT::SimpleValueType SVT = ValVT.getSimpleVT().SimpleTy;
7401 if (ValVT.isScalarInteger() &&
7402 (ValVT.getSizeInBits() < LocVT.getSizeInBits())) {
7404 truncateScalarIntegerArg(Flags, ValVT, DAG, ArgValue, LocVT, dl);
7411 const unsigned ValSize = ValVT.getStoreSize();
7425 DAG.getLoad(ValVT, dl, Chain, FIN, MachinePointerInfo());
7649 const MVT ValVT = VA.getValVT();
7682 ValVT.isFloatingPoint() && LocVT.isInteger() &&
7686 DAG.getBitcast(MVT::getIntegerVT(ValVT.getSizeInBits()), Arg);