Lines Matching refs:Swap
2020 unsigned &InsertAtByte, bool &Swap, bool IsLE) {
2039 Swap = M0 < 4;
2047 Swap = M1 < 4;
2055 Swap = M2 < 4;
2063 Swap = M3 < 4;
2071 Swap = true;
2095 bool &Swap, bool IsLE) {
2115 Swap = false;
2128 Swap = false;
2134 Swap = true;
2143 Swap = false;
2148 Swap = true;
2185 /// Can node \p N be lowered to an XXPERMDI instruction? If so, set \p Swap
2188 /// Specifically, set \p Swap to true only if \p N can be lowered to XXPERMDI
2194 bool &Swap, bool IsLE) {
2210 Swap = false;
2218 Swap = false;
2222 Swap = true;
2226 // Note: if control flow comes here that means Swap is already set above
2231 Swap = false;
2235 Swap = true;
2239 // Note: if control flow comes here that means Swap is already set above
2779 bool Swap = false;
2782 Swap = true;
2786 Swap = true;
2789 if (Swap)
9584 bool Swap = false;
9642 Swap = false;
9647 Swap = CurrentElement < BytesInVector;
9660 if (Swap)
9690 bool Swap = false;
9735 Swap = false;
9754 Swap = MaskOneElt < NumHalfWords;
9766 if (Swap)
9913 bool Swap = false;
9966 PPC::isXXINSERTWMask(SVOp, ShiftElts, InsertAtByte, Swap,
9968 if (Swap)
10000 PPC::isXXSLDWIShuffleMask(SVOp, ShiftElts, Swap, isLittleEndian)) {
10001 if (Swap)
10013 PPC::isXXPERMDIShuffleMask(SVOp, ShiftElts, Swap, isLittleEndian)) {
10014 if (Swap)
10058 SDValue Swap = DAG.getNode(PPCISD::SWAP_NO_CHAIN, dl, MVT::v2f64, Conv);
10059 return DAG.getNode(ISD::BITCAST, dl, MVT::v16i8, Swap);
13167 bool Swap, SDLoc &DL, SelectionDAG &DAG) {
13177 // Swap if needed. Depends on the condition code.
13178 if (Swap)
14401 SDValue Swap = DAG.getNode(
14403 DCI.AddToWorklist(Swap.getNode());
14407 SDValue N = DAG.getNode(ISD::BITCAST, dl, VecTy, Swap);
14411 N, Swap.getValue(1));
14414 return Swap;
14471 SDValue Swap = DAG.getNode(PPCISD::XXSWAPD, dl,
14473 DCI.AddToWorklist(Swap.getNode());
14474 Chain = Swap.getValue(1);
14475 SDValue StoreOps[] = { Chain, Swap, Base };