• Home
  • History
  • Annotate
  • Raw
  • Download
  • only in /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/

Lines Matching refs:SDValue

130 static SDValue widenVec(SelectionDAG &DAG, SDValue Vec, const SDLoc &dl);
1603 static bool isFloatingPointZero(SDValue Op) {
2263 SDValue PPC::get_VSPLTI_elt(SDNode *N, unsigned ByteSize, SelectionDAG &DAG) {
2264 SDValue OpVal(nullptr, 0);
2273 SDValue UniquedVals[4];
2280 if (!isa<ConstantSDNode>(N->getOperand(i))) return SDValue();
2285 return SDValue(); // no match.
2318 return SDValue();
2327 return SDValue();
2330 if (!OpVal.getNode()) return SDValue(); // All UNDEF: use implicit def.
2344 if (ValSizeInBytes < ByteSize) return SDValue();
2349 return SDValue();
2355 if (MaskVal == 0) return SDValue();
2360 return SDValue();
2411 bool llvm::isIntS16Immediate(SDValue Op, int16_t &Imm) {
2418 bool PPCTargetLowering::SelectAddressEVXRegReg(SDValue N, SDValue &Base,
2419 SDValue &Index,
2441 SDValue N, SDValue &Base, SDValue &Index, SelectionDAG &DAG,
2532 SDValue N, SDValue &Disp, SDValue &Base, SelectionDAG &DAG,
2620 Base = SDValue(DAG.getMachineNode(Opc, dl, CN->getValueType(0), Base), 0);
2636 bool PPCTargetLowering::SelectAddressRegRegOnly(SDValue N, SDValue &Base,
2637 SDValue &Index,
2666 template <typename Ty> static bool isValidPCRelNode(SDValue N) {
2674 bool PPCTargetLowering::SelectAddressPCRel(SDValue N, SDValue &Base) const {
2717 SDValue LoadedVal(N, 0);
2734 bool PPCTargetLowering::getPreIndexedAddressParts(SDNode *N, SDValue &Base,
2735 SDValue &Offset,
2741 SDValue Ptr;
2784 SDValue Val = cast<StoreSDNode>(N)->getValue();
2841 static SDValue LowerLabelRef(SDValue HiPart, SDValue LoPart, bool isPIC,
2845 SDValue Zero = DAG.getConstant(0, DL, PtrVT);
2847 SDValue Hi = DAG.getNode(PPCISD::Hi, DL, PtrVT, HiPart, Zero);
2848 SDValue Lo = DAG.getNode(PPCISD::Lo, DL, PtrVT, LoPart, Zero);
2869 SDValue PPCTargetLowering::getTOCEntry(SelectionDAG &DAG, const SDLoc &dl,
2870 SDValue GA) const {
2873 SDValue Reg = Is64Bit ? DAG.getRegister(PPC::X2, VT)
2877 SDValue Ops[] = { GA, Reg };
2884 SDValue PPCTargetLowering::LowerConstantPool(SDValue Op,
2896 SDValue ConstPool = DAG.getTargetConstantPool(
2901 SDValue GA = DAG.getTargetConstantPool(C, PtrVT, CP->getAlign(), 0);
2910 SDValue GA =
2915 SDValue CPIHi =
2917 SDValue CPILo =
2940 SDValue PPCTargetLowering::getPICJumpTableRelocBase(SDValue Table,
2971 SDValue PPCTargetLowering::LowerJumpTable(SDValue Op, SelectionDAG &DAG) const {
2979 SDValue GA =
2981 SDValue MatAddr = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
2989 SDValue GA = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
2998 SDValue GA = DAG.getTargetJumpTable(JT->getIndex(), PtrVT,
3003 SDValue JTIHi = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOHiFlag);
3004 SDValue JTILo = DAG.getTargetJumpTable(JT->getIndex(), PtrVT, MOLoFlag);
3008 SDValue PPCTargetLowering::LowerBlockAddress(SDValue Op,
3018 SDValue GA = DAG.getTargetBlockAddress(BA, Ty, BASDN->getOffset(),
3020 SDValue MatAddr = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
3028 SDValue GA = DAG.getTargetBlockAddress(BA, PtrVT, BASDN->getOffset());
3041 SDValue TgtBAHi = DAG.getTargetBlockAddress(BA, PtrVT, 0, MOHiFlag);
3042 SDValue TgtBALo = DAG.getTargetBlockAddress(BA, PtrVT, 0, MOLoFlag);
3046 SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
3067 SDValue TGAHi = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3069 SDValue TGALo = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3071 SDValue TLSReg = is64bit ? DAG.getRegister(PPC::X13, MVT::i64)
3074 SDValue Hi = DAG.getNode(PPCISD::Hi, dl, PtrVT, TGAHi, TLSReg);
3079 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
3080 SDValue TGATLS = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
3082 SDValue GOTPtr;
3085 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
3096 SDValue TPOffset = DAG.getNode(PPCISD::LD_GOT_TPREL_L, dl,
3102 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
3103 SDValue GOTPtr;
3106 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
3120 SDValue TGA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0, 0);
3121 SDValue GOTPtr;
3124 SDValue GOTReg = DAG.getRegister(PPC::X2, MVT::i64);
3133 SDValue TLSAddr = DAG.getNode(PPCISD::ADDI_TLSLD_L_ADDR, dl,
3135 SDValue DtvOffsetHi = DAG.getNode(PPCISD::ADDIS_DTPREL_HA, dl,
3143 SDValue PPCTargetLowering::LowerGlobalAddress(SDValue Op,
3156 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, Ty, GSDN->getOffset(),
3159 SDValue MatPCRel = DAG.getNode(PPCISD::MAT_PCREL_ADDR, DL, Ty, GA);
3160 SDValue Load = DAG.getLoad(MVT::i64, DL, DAG.getEntryNode(), MatPCRel,
3164 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, Ty, GSDN->getOffset(),
3170 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, PtrVT, GSDN->getOffset());
3179 SDValue GA = DAG.getTargetGlobalAddress(GV, DL, PtrVT,
3185 SDValue GAHi =
3187 SDValue GALo =
3193 SDValue PPCTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
3211 return SDValue();
3221 if (SDValue V = lowerCmpEqZeroToCtlzSrl(Op, DAG))
3229 return SDValue();
3240 SDValue Sub = DAG.getNode(ISD::XOR, dl, LHSVT, Op.getOperand(0),
3244 return SDValue();
3247 SDValue PPCTargetLowering::LowerVAARG(SDValue Op, SelectionDAG &DAG) const {
3251 SDValue InChain = Node->getOperand(0);
3252 SDValue VAListPtr = Node->getOperand(1);
3259 SDValue GprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain,
3265 SDValue GprAnd = DAG.getNode(ISD::AND, dl, MVT::i32, GprIndex,
3267 SDValue CC64 = DAG.getSetCC(dl, MVT::i32, GprAnd,
3269 SDValue GprIndexPlusOne = DAG.getNode(ISD::ADD, dl, MVT::i32, GprIndex,
3277 SDValue FprPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr,
3281 SDValue FprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain,
3285 SDValue RegSaveAreaPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr,
3288 SDValue OverflowAreaPtr = DAG.getNode(ISD::ADD, dl, PtrVT, VAListPtr,
3292 SDValue OverflowArea =
3296 SDValue RegSaveArea =
3301 SDValue CC = DAG.getSetCC(dl, MVT::i32, VT.isInteger() ? GprIndex : FprIndex,
3305 SDValue RegConstant = DAG.getNode(ISD::MUL, dl, MVT::i32,
3311 SDValue OurReg = DAG.getNode(ISD::ADD, dl, PtrVT, RegSaveArea,
3320 SDValue IndexPlus1 = DAG.getNode(ISD::ADD, dl, MVT::i32,
3330 SDValue Result = DAG.getNode(ISD::SELECT, dl, PtrVT, CC, OurReg, OverflowArea);
3333 SDValue OverflowAreaPlusN = DAG.getNode(ISD::ADD, dl, PtrVT, OverflowArea,
3346 SDValue PPCTargetLowering::LowerVACOPY(SDValue Op, SelectionDAG &DAG) const {
3357 SDValue PPCTargetLowering::LowerADJUST_TRAMPOLINE(SDValue Op,
3365 SDValue PPCTargetLowering::LowerINIT_TRAMPOLINE(SDValue Op,
3370 SDValue Chain = Op.getOperand(0);
3371 SDValue Trmp = Op.getOperand(1); // trampoline
3372 SDValue FPtr = Op.getOperand(2); // nested function
3373 SDValue Nest = Op.getOperand(3); // 'nest' parameter value
3400 std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
3404 SDValue PPCTargetLowering::LowerVASTART(SDValue Op, SelectionDAG &DAG) const {
3414 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
3444 SDValue ArgGPR = DAG.getConstant(FuncInfo->getVarArgsNumGPR(), dl, MVT::i32);
3445 SDValue ArgFPR = DAG.getConstant(FuncInfo->getVarArgsNumFPR(), dl, MVT::i32);
3446 SDValue StackOffsetFI = DAG.getFrameIndex(FuncInfo->getVarArgsStackOffset(),
3448 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
3452 SDValue ConstFrameOffset = DAG.getConstant(FrameOffset, dl, PtrVT);
3455 SDValue ConstStackOffset = DAG.getConstant(StackOffset, dl, PtrVT);
3458 SDValue ConstFPROffset = DAG.getConstant(FPROffset, dl, PtrVT);
3463 SDValue firstStore =
3467 SDValue nextPtr = DAG.getNode(ISD::ADD, dl, PtrVT, Op.getOperand(1),
3471 SDValue secondStore =
3478 SDValue thirdStore = DAG.getStore(secondStore, dl, StackOffsetFI, nextPtr,
3623 SDValue PPCTargetLowering::LowerFormalArguments(
3624 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
3626 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
3641 SDValue PPCTargetLowering::LowerFormalArguments_32SVR4(
3642 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
3644 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
3751 SDValue ArgValue;
3758 SDValue ArgValueLo = DAG.getCopyFromReg(Chain, dl, RegLo, MVT::i32);
3759 SDValue ArgValueHi = DAG.getCopyFromReg(Chain, dl, RegHi, MVT::i32);
3787 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
3817 SmallVector<SDValue, 8> MemOps;
3850 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
3861 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
3862 SDValue Store =
3866 SDValue PtrOff = DAG.getConstant(PtrVT.getSizeInBits()/8, dl, PtrVT);
3880 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::f64);
3881 SDValue Store =
3885 SDValue PtrOff = DAG.getConstant(MVT(MVT::f64).getSizeInBits()/8, dl,
3899 SDValue PPCTargetLowering::extendArgForPPC64(ISD::ArgFlagsTy Flags,
3901 SDValue ArgVal,
3913 SDValue PPCTargetLowering::LowerFormalArguments_64SVR4(
3914 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
3916 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
3978 SmallVector<SDValue, 8> MemOps;
3982 SDValue ArgVal;
4034 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4051 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4057 SDValue Arg = FIN;
4059 SDValue ArgOff = DAG.getConstant(PtrByteSize - ObjSize, dl, PtrVT);
4067 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4068 SDValue Store;
4102 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4103 SDValue Addr = FIN;
4105 SDValue Off = DAG.getConstant(j, dl, PtrVT);
4108 SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, Addr,
4274 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4307 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
4315 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4316 SDValue Store =
4320 SDValue PtrOff = DAG.getConstant(PtrByteSize, dl, PtrVT);
4331 SDValue PPCTargetLowering::LowerFormalArguments_Darwin(
4332 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
4334 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
4427 SmallVector<SDValue, 8> MemOps;
4432 SDValue ArgVal;
4474 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4483 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4485 SDValue Store =
4507 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4508 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4509 SDValue Store = DAG.getStore(Val.getValue(1), dl, Val, FIN,
4630 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
4662 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
4675 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
4676 SDValue Store =
4680 SDValue PtrOff = DAG.getConstant(PtrVT.getSizeInBits()/8, dl, PtrVT);
4708 static bool isFunctionGlobalAddress(SDValue Callee);
4710 static bool callsShareTOCBase(const Function *Caller, SDValue Callee,
4874 SDValue Callee, CallingConv::ID CalleeCC, const CallBase *CB, bool isVarArg,
4961 PPCTargetLowering::IsEligibleForTailCallOptimization(SDValue Callee,
4998 static SDNode *isBLACompatibleAddress(SDValue Op, SelectionDAG &DAG) {
5017 SDValue Arg;
5018 SDValue FrameIdxOp;
5028 SelectionDAG &DAG, SDValue Chain,
5030 SmallVectorImpl<SDValue> &MemOpChains, const SDLoc &dl) {
5032 SDValue Arg = TailCallArgs[i].Arg;
5033 SDValue FIN = TailCallArgs[i].FrameIdxOp;
5044 static SDValue EmitTailCallStoreFPAndRetAddr(SelectionDAG &DAG, SDValue Chain,
5045 SDValue OldRetAddr, SDValue OldFP,
5058 SDValue NewRetAddrFrIdx = DAG.getFrameIndex(NewRetAddr, VT);
5069 SDValue Arg, int SPDiff, unsigned ArgOffset,
5075 SDValue FIN = DAG.getFrameIndex(FI, VT);
5086 SDValue PPCTargetLowering::EmitTailCallLoadFPAndRetAddr(
5087 SelectionDAG &DAG, int SPDiff, SDValue Chain, SDValue &LROpOut,
5088 SDValue &FPOpOut, const SDLoc &dl) const {
5094 Chain = SDValue(LROpOut.getNode(), 1);
5105 static SDValue CreateCopyOfByValArgument(SDValue Src, SDValue Dst,
5106 SDValue Chain, ISD::ArgFlagsTy Flags,
5108 SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), dl, MVT::i32);
5117 SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg,
5118 SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64,
5119 bool isTailCall, bool isVector, SmallVectorImpl<SDValue> &MemOpChains,
5124 SDValue StackPtr;
5140 PrepareTailCall(SelectionDAG &DAG, SDValue &InFlag, SDValue &Chain,
5141 const SDLoc &dl, int SPDiff, unsigned NumBytes, SDValue LROp,
5142 SDValue FPOp,
5146 SmallVector<SDValue, 8> MemOpChains2;
5148 InFlag = SDValue();
5165 static bool isFunctionGlobalAddress(SDValue Callee) {
5177 SDValue PPCTargetLowering::LowerCallResult(
5178 SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg,
5180 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
5195 SDValue Val;
5198 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5203 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
5241 static bool isIndirectCall(const SDValue &Callee, SelectionDAG &DAG,
5270 const SDValue &Callee,
5310 static SDValue transformCallee(const SDValue &Callee, SelectionDAG &DAG,
5314 return SDValue(Dest, 0);
5401 static SDValue getOutputChainFromCallSeq(SDValue CallSeqStart) {
5408 SDValue LastValue = CallSeqStart.getValue(CallSeqStart->getNumValues() - 1);
5417 static void prepareIndirectCall(SelectionDAG &DAG, SDValue &Callee,
5418 SDValue &Glue, SDValue &Chain,
5420 SDValue MTCTROps[] = {Chain, Callee, Glue};
5428 static void prepareDescriptorIndirectCall(SelectionDAG &DAG, SDValue &Callee,
5429 SDValue &Glue, SDValue &Chain,
5430 SDValue CallSeqStart,
5461 SDValue LDChain = getOutputChainFromCallSeq(CallSeqStart);
5481 SDValue LoadFuncPtr = DAG.getLoad(RegVT, dl, LDChain, Callee, MPI,
5486 SDValue TOCOff = DAG.getIntPtrConstant(TOCAnchorOffset, dl);
5487 SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, Callee, TOCOff);
5488 SDValue TOCPtr =
5493 SDValue PtrOff = DAG.getIntPtrConstant(EnvPtrOffset, dl);
5494 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, RegVT, Callee, PtrOff);
5495 SDValue LoadEnvPtr =
5501 SDValue TOCVal = DAG.getCopyToReg(Chain, dl, TOCReg, TOCPtr, Glue);
5510 SDValue EnvVal = DAG.getCopyToReg(Chain, dl, EnvPtrReg, LoadEnvPtr, Glue);
5521 buildCallOperands(SmallVectorImpl<SDValue> &Ops,
5524 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass,
5525 SDValue Glue, SDValue Chain, SDValue &Callee, int SPDiff,
5552 SDValue StackPtr = DAG.getRegister(StackPtrReg, RegVT);
5554 SDValue TOCOff = DAG.getIntPtrConstant(TOCSaveOffset, dl);
5555 SDValue AddTOC = DAG.getNode(ISD::ADD, dl, RegVT, StackPtr, TOCOff);
5603 SDValue PPCTargetLowering::FinishCall(
5605 SmallVector<std::pair<unsigned, SDValue>, 8> &RegsToPass, SDValue Glue,
5606 SDValue Chain, SDValue CallSeqStart, SDValue &Callee, int SPDiff,
5608 SmallVectorImpl<SDValue> &InVals, const CallBase *CB) const {
5627 SmallVector<SDValue, 8> Ops;
5673 SDValue
5675 SmallVectorImpl<SDValue> &InVals) const {
5679 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals;
5681 SDValue Chain = CLI.Chain;
5682 SDValue Callee = CLI.Callee;
5705 // case the SDValue for the callee could be a load (to load the address
5754 SDValue PPCTargetLowering::LowerCall_32SVR4(
5755 SDValue Chain, SDValue Callee, CallFlags CFlags,
5757 const SmallVectorImpl<SDValue> &OutVals,
5759 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
5853 SDValue CallSeqStart = Chain;
5857 SDValue LROp, FPOp;
5863 SDValue StackPtr = DAG.getRegister(PPC::R1, MVT::i32);
5865 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
5867 SmallVector<SDValue, 8> MemOpChains;
5878 SDValue Arg = OutVals[RealArgIdx];
5893 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, dl);
5899 SDValue MemcpyCall =
5905 SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, NumBytes, 0,
5930 SDValue SVal = DAG.getNode(PPCISD::EXTRACT_SPE, dl, MVT::i32, Arg,
5945 SDValue PtrOff = DAG.getIntPtrConstant(LocMemOffset, dl);
5964 SDValue InFlag;
5975 SDValue Ops[] = { Chain, InFlag };
5993 SDValue PPCTargetLowering::createMemcpyOutsideCallSeq(
5994 SDValue Arg, SDValue PtrOff, SDValue CallSeqStart, ISD::ArgFlagsTy Flags,
5996 SDValue MemcpyCall = CreateCopyOfByValArgument(Arg, PtrOff,
6001 SDValue NewCallSeqStart = DAG.getCALLSEQ_START(MemcpyCall, FrameSize, 0,
6008 SDValue PPCTargetLowering::LowerCall_64SVR4(
6009 SDValue Chain, SDValue Callee, CallFlags CFlags,
6011 const SmallVectorImpl<SDValue> &OutVals,
6013 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
6193 SDValue CallSeqStart = Chain;
6197 SDValue LROp, FPOp;
6203 SDValue StackPtr = DAG.getRegister(PPC::X1, MVT::i64);
6211 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
6214 SmallVector<SDValue, 8> MemOpChains;
6216 SDValue Arg = OutVals[i];
6223 SDValue PtrOff;
6277 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg,
6288 SDValue AddPtr = PtrOff;
6290 SDValue Const = DAG.getConstant(PtrByteSize - Size, dl,
6328 SDValue AddPtr = PtrOff;
6330 SDValue Const = DAG.getConstant(8 - Size, dl, PtrOff.getValueType());
6338 SDValue Load =
6351 SDValue Const = DAG.getConstant(j, dl, PtrOff.getValueType());
6352 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const);
6354 SDValue Load =
6426 SDValue ArgVal;
6440 SDValue Lo, Hi;
6458 ArgVal = SDValue();
6470 SDValue ConstFour = DAG.getConstant(4, dl, PtrOff.getValueType());
6515 SDValue Store =
6519 SDValue Load =
6528 SDValue Ix = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff,
6530 SDValue Load =
6571 SDValue Store =
6575 SDValue Load = DAG.getLoad(IsF32 ? MVT::v4f32 : MVT::v4f64, dl, Store,
6584 SDValue Ix = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff,
6586 SDValue Load =
6634 SDValue Val = DAG.getCopyFromReg(Chain, dl, PPC::X2, MVT::i64);
6637 SDValue PtrOff = DAG.getIntPtrConstant(TOCSaveOffset, dl);
6638 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
6652 SDValue InFlag;
6667 SDValue PPCTargetLowering::LowerCall_Darwin(
6668 SDValue Chain, SDValue Callee, CallFlags CFlags,
6670 const SmallVectorImpl<SDValue> &OutVals,
6672 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
6753 SDValue CallSeqStart = Chain;
6757 SDValue LROp, FPOp;
6763 SDValue StackPtr;
6794 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
6797 SmallVector<SDValue, 8> MemOpChains;
6799 SDValue Arg = OutVals[i];
6804 SDValue PtrOff;
6827 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg,
6834 SDValue Const = DAG.getConstant(PtrByteSize - Size, dl,
6836 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff, Const);
6855 SDValue Const = DAG.getConstant(j, dl, PtrOff.getValueType());
6856 SDValue AddArg = DAG.getNode(ISD::ADD, dl, PtrVT, Arg, Const);
6858 SDValue Load =
6894 SDValue Store =
6900 SDValue Load =
6906 SDValue ConstFour = DAG.getConstant(4, dl, PtrOff.getValueType());
6908 SDValue Load =
6951 SDValue Store =
6955 SDValue Load =
6964 SDValue Ix = DAG.getNode(ISD::ADD, dl, PtrVT, PtrOff,
6966 SDValue Load =
7000 SDValue Arg = OutVals[i];
7005 SDValue PtrOff;
7030 SDValue InFlag;
7193 static SDValue truncateScalarIntegerArg(ISD::ArgFlagsTy Flags, EVT ValVT,
7194 SelectionDAG &DAG, SDValue ArgValue,
7267 SDValue PPCTargetLowering::LowerFormalArguments_AIX(
7268 SDValue Chain, CallingConv::ID CallConv, bool isVarArg,
7270 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const {
7302 SmallVector<SDValue, 8> MemOps;
7325 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
7344 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
7357 SDValue CopyFrom = DAG.getCopyFromReg(Chain, dl, VReg, LocVT);
7363 SDValue Store =
7400 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, LocVT);
7423 SDValue FIN = DAG.getFrameIndex(FI, PtrVT);
7424 SDValue ArgValue =
7449 SDValue FIN = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
7469 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT);
7470 SDValue Store =
7474 SDValue PtrOff = DAG.getConstant(PtrByteSize, dl, PtrVT);
7485 SDValue PPCTargetLowering::LowerCall_AIX(
7486 SDValue Chain, SDValue Callee, CallFlags CFlags,
7488 const SmallVectorImpl<SDValue> &OutVals,
7490 SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals,
7539 SDValue CallSeqStart = Chain;
7541 SmallVector<std::pair<unsigned, SDValue>, 8> RegsToPass;
7542 SmallVector<SDValue, 8> MemOpChains;
7547 const SDValue StackPtr = IsPPC64 ? DAG.getRegister(PPC::X1, MVT::i64)
7552 SDValue Arg = OutVals[ValNo];
7576 SDValue Load = GetLoad(PtrVT, LoadOffset);
7614 SDValue ResidueVal;
7620 SDValue Load = GetLoad(VT, LoadOffset);
7634 SDValue SHLAmt = DAG.getConstant(NumSHLBits, dl, ShiftAmountTy);
7635 SDValue ShiftedLoad =
7670 SDValue PtrOff =
7685 SDValue ArgAsInt =
7702 SDValue MSWAsI64 = DAG.getNode(ISD::SRL, dl, MVT::i64, ArgAsInt,
7735 SDValue Val = DAG.getCopyFromReg(Chain, dl, TOCBaseReg, PtrVT);
7736 SDValue PtrOff = DAG.getIntPtrConstant(TOCSaveOffset, dl);
7737 SDValue StackPtr = DAG.getRegister(StackPtrReg, PtrVT);
7738 SDValue AddPtr = DAG.getNode(ISD::ADD, dl, PtrVT, StackPtr, PtrOff);
7746 SDValue InFlag;
7770 SDValue
7771 PPCTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv,
7774 const SmallVectorImpl<SDValue> &OutVals,
7784 SDValue Flag;
7785 SmallVector<SDValue, 4> RetOps(1, Chain);
7792 SDValue Arg = OutVals[RealResIdx];
7810 SDValue SVal =
7835 SDValue
7836 PPCTargetLowering::LowerGET_DYNAMIC_AREA_OFFSET(SDValue Op,
7844 SDValue Chain = Op.getOperand(0);
7845 SDValue FPSIdx = getFramePointerFrameIndex(DAG);
7847 SDValue Ops[2] = {Chain, FPSIdx};
7852 SDValue PPCTargetLowering::LowerSTACKRESTORE(SDValue Op,
7863 SDValue StackPtr = DAG.getRegister(SP, PtrVT);
7866 SDValue Chain = Op.getOperand(0);
7867 SDValue SaveSP = Op.getOperand(1);
7870 SDValue LoadLinkSP =
7880 SDValue PPCTargetLowering::getReturnAddrFrameIndex(SelectionDAG &DAG) const {
7902 SDValue
7925 SDValue PPCTargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
7929 SDValue Chain = Op.getOperand(0);
7930 SDValue Size = Op.getOperand(1);
7936 SDValue NegSize = DAG.getNode(ISD::SUB, dl, PtrVT,
7939 SDValue FPSIdx = getFramePointerFrameIndex(DAG);
7940 SDValue Ops[3] = { Chain, NegSize, FPSIdx };
7947 SDValue PPCTargetLowering::LowerEH_DWARF_CFA(SDValue Op,
7958 SDValue PPCTargetLowering::lowerEH_SJLJ_SETJMP(SDValue Op,
7966 SDValue PPCTargetLowering::lowerEH_SJLJ_LONGJMP(SDValue Op,
7973 SDValue PPCTargetLowering::LowerLOAD(SDValue Op, SelectionDAG &DAG) const {
7985 SDValue Chain = LD->getChain();
7986 SDValue BasePtr = LD->getBasePtr();
7989 SDValue NewLD =
7992 SDValue Result = DAG.getNode(ISD::TRUNCATE, dl, MVT::i1, NewLD);
7994 SDValue Ops[] = { Result, SDValue(NewLD.getNode(), 1) };
7998 SDValue PPCTargetLowering::LowerSTORE(SDValue Op, SelectionDAG &DAG) const {
8010 SDValue Chain = ST->getChain();
8011 SDValue BasePtr = ST->getBasePtr();
8012 SDValue Value = ST->getValue();
8021 SDValue PPCTargetLowering::LowerTRUNCATE(SDValue Op, SelectionDAG &DAG) const {
8029 SDValue PPCTargetLowering::LowerTRUNCATEVector(SDValue Op,
8054 SDValue N1 = Op.getOperand(0);
8057 SDValue WideSrc = SrcSize == 128 ? N1 : widenVec(DAG, N1, DL);
8080 SDValue Conv = DAG.getNode(ISD::BITCAST, DL, WideVT, WideSrc);
8086 SDValue PPCTargetLowering::LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const {
8096 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
8097 SDValue TV = Op.getOperand(2), FV = Op.getOperand(3);
8126 SDValue Sel1;
8162 SDValue Cmp;
8205 void PPCTargetLowering::LowerFP_TO_INTForReuse(SDValue Op, ReuseLoadInfo &RLI,
8209 SDValue Src = Op.getOperand(0);
8213 SDValue Tmp;
8235 SDValue FIPtr = DAG.CreateStackTemporary(i32Stack ? MVT::i32 : MVT::f64);
8241 SDValue Chain;
8248 SDValue Ops[] = { DAG.getEntryNode(), Tmp, FIPtr };
8271 SDValue PPCTargetLowering::LowerFP_TO_INTDirectMove(SDValue Op,
8275 SDValue Src = Op.getOperand(0);
8280 SDValue Tmp;
8303 SDValue PPCTargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG,
8315 SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl,
8318 SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl,
8323 SDValue Res = DAG.getNode(PPCISD::FADDRTZ, dl, MVT::f64, Lo, Hi);
8331 SDValue Tmp = DAG.getConstantFP(APF, dl, MVT::ppcf128);
8335 SDValue True = DAG.getNode(ISD::FSUB, dl, MVT::ppcf128,
8340 SDValue False = DAG.getNode(ISD::FP_TO_SINT, dl, MVT::i32,
8347 return SDValue();
8368 bool PPCTargetLowering::canReuseLoadAddress(SDValue Op, EVT MemVT,
8407 RLI.ResChain = SDValue(LD, LD->isIndexed() ? 2 : 1);
8415 void PPCTargetLowering::spliceIntoChain(SDValue ResChain,
8416 SDValue NewResChain,
8423 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
8435 bool PPCTargetLowering::directMoveIsProfitable(const SDValue &Op) const {
8465 SDValue PPCTargetLowering::LowerINT_TO_FPDirectMove(SDValue Op,
8473 SDValue FP;
8474 SDValue Src = Op.getOperand(0);
8494 static SDValue widenVec(SelectionDAG &DAG, SDValue Vec, const SDLoc &dl) {
8505 SmallVector<SDValue, 16> Ops(NumConcat);
8507 SDValue UndefVec = DAG.getUNDEF(VecVT);
8514 SDValue PPCTargetLowering::LowerINT_TO_FPVector(SDValue Op, SelectionDAG &DAG,
8526 SDValue Wide = widenVec(DAG, Op.getOperand(0), dl);
8544 SDValue ShuffleSrc2 =
8546 SDValue Arrange = DAG.getVectorShuffle(WideVT, dl, Wide, ShuffleSrc2, ShuffV);
8548 SDValue Extend;
8564 SDValue PPCTargetLowering::LowerINT_TO_FP(SDValue Op,
8580 return SDValue();
8582 SDValue Value = Op.getOperand(0);
8588 SDValue FPHalfs = DAG.getConstantFP(0.5, dl, MVT::v4f64);
8601 return SDValue();
8629 SDValue SINT = Op.getOperand(0);
8650 SDValue Round = DAG.getNode(ISD::AND, dl, MVT::i64,
8666 SDValue Cond = DAG.getNode(ISD::SRA, dl, MVT::i64,
8679 SDValue Bits;
8691 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8701 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8715 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
8717 SDValue Store =
8734 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8742 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Bits);
8760 SDValue Ld;
8767 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
8769 SDValue Store =
8787 SDValue Ops[] = { RLI.Chain, RLI.Ptr };
8799 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
8801 SDValue Ext64 = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i64,
8805 SDValue Store = DAG.getStore(
8816 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Ld);
8823 SDValue PPCTargetLowering::LowerFLT_ROUNDS_(SDValue Op,
8850 SDValue Chain = Op.getOperand(0);
8851 SDValue MFFS = DAG.getNode(PPCISD::MFFS, dl, {MVT::f64, MVT::Other}, Chain);
8856 SDValue StackSlot = DAG.getFrameIndex(SSFI, PtrVT);
8860 SDValue Four = DAG.getConstant(4, dl, PtrVT);
8861 SDValue Addr = DAG.getNode(ISD::ADD, dl, PtrVT, StackSlot, Four);
8862 SDValue CWD = DAG.getLoad(MVT::i32, dl, Chain, Addr, MachinePointerInfo());
8866 SDValue CWD1 =
8869 SDValue CWD2 =
8877 SDValue RetVal =
8887 SDValue PPCTargetLowering::LowerSHL_PARTS(SDValue Op, SelectionDAG &DAG) const {
8897 SDValue Lo = Op.getOperand(0);
8898 SDValue Hi = Op.getOperand(1);
8899 SDValue Amt = Op.getOperand(2);
8902 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
8904 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt);
8905 SDValue Tmp3 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Tmp1);
8906 SDValue Tmp4 = DAG.getNode(ISD::OR , dl, VT, Tmp2, Tmp3);
8907 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt,
8909 SDValue Tmp6 = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Tmp5);
8910 SDValue OutHi = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6);
8911 SDValue OutLo = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Amt);
8912 SDValue OutOps[] = { OutLo, OutHi };
8916 SDValue PPCTargetLowering::LowerSRL_PARTS(SDValue Op, SelectionDAG &DAG) const {
8926 SDValue Lo = Op.getOperand(0);
8927 SDValue Hi = Op.getOperand(1);
8928 SDValue Amt = Op.getOperand(2);
8931 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
8933 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt);
8934 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1);
8935 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3);
8936 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt,
8938 SDValue Tmp6 = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Tmp5);
8939 SDValue OutLo = DAG.getNode(ISD::OR, dl, VT, Tmp4, Tmp6);
8940 SDValue OutHi = DAG.getNode(PPCISD::SRL, dl, VT, Hi, Amt);
8941 SDValue OutOps[] = { OutLo, OutHi };
8945 SDValue PPCTargetLowering::LowerSRA_PARTS(SDValue Op, SelectionDAG &DAG) const {
8954 SDValue Lo = Op.getOperand(0);
8955 SDValue Hi = Op.getOperand(1);
8956 SDValue Amt = Op.getOperand(2);
8959 SDValue Tmp1 = DAG.getNode(ISD::SUB, dl, AmtVT,
8961 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt);
8962 SDValue Tmp3 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Tmp1);
8963 SDValue Tmp4 = DAG.getNode(ISD::OR, dl, VT, Tmp2, Tmp3);
8964 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt,
8966 SDValue Tmp6 = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Tmp5);
8967 SDValue OutHi = DAG.getNode(PPCISD::SRA, dl, VT, Hi, Amt);
8968 SDValue OutLo = DAG.getSelectCC(dl, Tmp5, DAG.getConstant(0, dl, AmtVT),
8970 SDValue OutOps[] = { OutLo, OutHi };
8980 static SDValue getCanonicalConstSplat(uint64_t Val, unsigned SplatSize, EVT VT,
9002 static SDValue BuildIntrinsicOp(unsigned IID, SDValue Op, SelectionDAG &DAG,
9011 static SDValue BuildIntrinsicOp(unsigned IID, SDValue LHS, SDValue RHS,
9021 static SDValue BuildIntrinsicOp(unsigned IID, SDValue Op0, SDValue Op1,
9022 SDValue Op2, SelectionDAG &DAG, const SDLoc &dl,
9031 static SDValue BuildVSLDOI(SDValue LHS, SDValue RHS, unsigned Amt, EVT VT,
9040 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, LHS, RHS, Ops);
9068 SDValue Op0 = V->getOperand(0);
9098 SDValue PPCTargetLowering::LowerBITCAST(SDValue Op, SelectionDAG &DAG) const {
9101 SDValue Op0 = Op->getOperand(0);
9107 return SDValue();
9113 static const SDValue *getNormalLoadInput(const SDValue &Op, bool &IsPermuted) {
9114 const SDValue *InputLoad = &Op;
9161 SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
9176 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
9207 SDValue CPIdx =
9210 SDValue Ops[] = {DAG.getEntryNode(), CPIdx};
9217 SmallVector<SDValue, 4> Stores;
9222 SDValue Idx = DAG.getConstant(Offset, dl, FIdx.getValueType());
9231 SDValue StoreValue = BVN->getOperand(i);
9240 SDValue StoreChain;
9251 SDValue Ops[] = {StoreChain,
9256 SDValue LoadedVect = DAG.getMemIntrinsicNode(ISD::INTRINSIC_W_CHAIN,
9262 SDValue FPZeros = DAG.getConstantFP(0.0, dl, MVT::v4f64);
9269 return SDValue();
9285 SDValue SplatNode = DAG.getNode(
9294 const SDValue *InputLoad =
9310 SDValue Ops[] = {
9329 return SDValue();
9342 SDValue Z = DAG.getConstant(0, dl, MVT::v4i32);
9386 SDValue Elt = DAG.getConstant(SextVal, dl, MVT::i32);
9389 SDValue EltSize = DAG.getConstant(SplatSize, dl, MVT::i32);
9390 SDValue RetVal = DAG.getNode(PPCISD::VADD_SPLAT, dl, VT, Elt, EltSize);
9402 SDValue OnesV = getCanonicalConstSplat(-1, 4, MVT::v4i32, DAG, dl);
9405 SDValue Res = BuildIntrinsicOp(Intrinsic::ppc_altivec_vslw, OnesV,
9430 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9441 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9452 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9464 SDValue Res = getCanonicalConstSplat(i, SplatSize, MVT::Other, DAG, dl);
9475 SDValue T = getCanonicalConstSplat(i, SplatSize, MVT::v16i8, DAG, dl);
9481 SDValue T = getCanonicalConstSplat(i, SplatSize, MVT::v16i8, DAG, dl);
9487 SDValue T = getCanonicalConstSplat(i, SplatSize, MVT::v16i8, DAG, dl);
9493 return SDValue();
9498 static SDValue GeneratePerfectShuffle(unsigned PFEntry, SDValue LHS,
9499 SDValue RHS, SelectionDAG &DAG,
9524 SDValue OpLHS, OpRHS;
9569 SDValue T = DAG.getVectorShuffle(MVT::v16i8, dl, OpLHS, OpRHS, ShufIdxs);
9573 /// lowerToVINSERTB - Return the SDValue if this VECTOR_SHUFFLE can be handled
9575 /// SDValue.
9576 SDValue PPCTargetLowering::lowerToVINSERTB(ShuffleVectorSDNode *N,
9581 SDValue V1 = N->getOperand(0);
9582 SDValue V2 = N->getOperand(1);
9656 return SDValue();
9665 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v16i8, V2, V2,
9674 /// lowerToVINSERTH - Return the SDValue if this VECTOR_SHUFFLE can be handled
9676 /// SDValue.
9677 SDValue PPCTargetLowering::lowerToVINSERTH(ShuffleVectorSDNode *N,
9683 return SDValue();
9687 SDValue V1 = N->getOperand(0);
9688 SDValue V2 = N->getOperand(1);
9762 return SDValue();
9770 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1);
9773 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v16i8, V2, V2,
9775 SDValue Conv2 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, Shl);
9776 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2,
9780 SDValue Conv2 = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V2);
9781 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v8i16, Conv1, Conv2,
9786 /// lowerToXXSPLTI32DX - Return the SDValue if this VECTOR_SHUFFLE can be
9788 /// return the default SDValue.
9789 SDValue PPCTargetLowering::lowerToXXSPLTI32DX(ShuffleVectorSDNode *SVN,
9793 SDValue LHS = peekThroughBitcasts(SVN->getOperand(0));
9794 SDValue RHS = peekThroughBitcasts(SVN->getOperand(1));
9797 SDValue VecShuffle(SVN, 0);
9802 return SDValue();
9814 return SDValue();
9823 return SDValue();
9832 SDValue Index;
9843 return SDValue();
9851 SDValue SplatNode = DAG.getNode(
9861 SDValue PPCTargetLowering::LowerROTL(SDValue Op, SelectionDAG &DAG) const {
9866 SDValue N0 = peekThroughBitcasts(Op.getOperand(0));
9867 SDValue N1 = peekThroughBitcasts(Op.getOperand(1));
9873 if (SDValue Shuffle =
9878 SDValue ArgVal = DAG.getBitcast(MVT::i128, N0);
9879 SDValue SHLOp = DAG.getNode(ISD::SHL, dl, MVT::i128, ArgVal,
9881 SDValue SRLOp = DAG.getNode(ISD::SRL, dl, MVT::i128, ArgVal,
9883 SDValue OROp = DAG.getNode(ISD::OR, dl, MVT::i128, SHLOp, SRLOp);
9891 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
9894 SDValue V1 = Op.getOperand(0);
9895 SDValue V2 = Op.getOperand(1);
9901 if (SDValue NewShuffle = combineVectorShuffle(SVOp, DAG)) {
9919 const SDValue *InputLoad = getNormalLoadInput(V1, IsPermutedLoad);
9946 SDValue BasePtr = LD->getBasePtr();
9950 SDValue Ops[] = {
9957 SDValue LdSplt =
9970 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
9971 SDValue Conv2 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V2);
9973 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv2, Conv2,
9975 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Shl,
9979 SDValue Ins = DAG.getNode(PPCISD::VECINSERT, dl, MVT::v4i32, Conv1, Conv2,
9985 SDValue SplatInsertNode;
9991 SDValue NewISDNode;
10003 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10004 SDValue Conv2 =
10007 SDValue Shl = DAG.getNode(PPCISD::VECSHL, dl, MVT::v4i32, Conv1, Conv2,
10016 SDValue Conv1 = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1);
10017 SDValue Conv2 =
10020 SDValue PermDI = DAG.getNode(PPCISD::XXPERMDI, dl, MVT::v2i64, Conv1, Conv2,
10027 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v8i16, V1);
10028 SDValue ReveHWord = DAG.getNode(ISD::BSWAP, dl, MVT::v8i16, Conv);
10031 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10032 SDValue ReveWord = DAG.getNode(ISD::BSWAP, dl, MVT::v4i32, Conv);
10035 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v2i64, V1);
10036 SDValue ReveDWord = DAG.getNode(ISD::BSWAP, dl, MVT::v2i64, Conv);
10039 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v1i128, V1);
10040 SDValue ReveQWord = DAG.getNode(ISD::BSWAP, dl, MVT::v1i128, Conv);
10049 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v4i32, V1);
10050 SDValue Splat = DAG.getNode(PPCISD::XXSPLT, dl, MVT::v4i32, Conv,
10057 SDValue Conv = DAG.getNode(ISD::BITCAST, dl, MVT::v2f64, V1);
10058 SDValue Swap = DAG.getNode(PPCISD::SWAP_NO_CHAIN, dl, MVT::v2f64, Conv);
10065 return SDValue();
10094 SDValue V3 = DAG.getNode(PPCISD::QVGPCI, dl, MVT::v4f64,
10212 SmallVector<SDValue, 16> ResultMask;
10226 SDValue VPermMask = DAG.getBuildVector(MVT::v16i8, dl, ResultMask);
10243 static bool getVectorCompareInfo(SDValue Intrin, int &CompareOpc,
10489 SDValue PPCTargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
10508 return SDValue(); // Don't custom lower most intrinsics.
10512 SDValue Tmp = DAG.getNode(PPCISD::VCMP, dl, Op.getOperand(2).getValueType(),
10519 SDValue Ops[] = {
10525 SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops);
10529 SDValue Flags = DAG.getNode(PPCISD::MFOCRF, dl, MVT::i32,
10566 SDValue PPCTargetLowering::LowerINTRINSIC_VOID(SDValue Op,
10576 return SDValue(DAG.getMachineNode(PPC::CFENCE8, DL, MVT::Other,
10585 return SDValue();
10589 SDValue PPCTargetLowering::LowerBSWAP(SDValue Op, SelectionDAG &DAG) const {
10607 SDValue PPCTargetLowering::LowerATOMIC_CMP_SWAP(SDValue Op,
10617 SDValue CmpOp = Op.getOperand(2);
10625 SDValue NewCmpOp =
10630 SmallVector<SDValue, 4> Ops;
10641 SDValue PPCTargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op,
10648 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
10651 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Op.getOperand(0), FIdx,
10657 SDValue PPCTargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op,
10665 return SDValue();
10669 SDValue V1 = Op.getOperand(0);
10670 SDValue V2 = Op.getOperand(1);
10673 SDValue Mtvsrz = DAG.getNode(PPCISD::MTVSRZ, dl, VT, V2);
10686 SDValue PPCTargetLowering::LowerEXTRACT_VECTOR_ELT(SDValue Op,
10694 SDValue Value = N->getOperand(0);
10706 SDValue FPHalfs = DAG.getConstantFP(0.5, dl, MVT::v4f64);
10720 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
10722 SDValue StoreChain = DAG.getEntryNode();
10723 SDValue Ops[] = {StoreChain,
10733 SDValue Idx = DAG.getConstant(Offset, dl, FIdx.getValueType());
10736 SDValue IntVal =
10746 SDValue PPCTargetLowering::LowerVectorLoad(SDValue Op,
10750 SDValue LoadChain = LN->getChain();
10751 SDValue BasePtr = LN->getBasePtr();
10766 SDValue Vals[4], LoadChains[4];
10768 SDValue Load;
10796 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
10797 SDValue Value = DAG.getBuildVector(Op.getValueType(), dl, Vals);
10800 SDValue RetOps[] = { Value, Vals[0].getValue(1), TF };
10804 SDValue RetOps[] = { Value, TF };
10814 SDValue VectElmts[4], VectElmtChains[4];
10816 SDValue Idx = DAG.getConstant(i, dl, BasePtr.getValueType());
10827 SDValue Value = DAG.getBuildVector(MVT::v4i1, dl, VectElmts);
10829 SDValue RVals[] = { Value, LoadChain };
10834 SDValue PPCTargetLowering::LowerVectorStore(SDValue Op,
10838 SDValue StoreChain = SN->getChain();
10839 SDValue BasePtr = SN->getBasePtr();
10840 SDValue Value = SN->getValue();
10855 SDValue Stores[4];
10857 SDValue Ex = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ScalarVT, Value,
10859 SDValue Store;
10885 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Stores);
10888 SDValue RetOps[] = { TF, Stores[0].getValue(1) };
10905 SDValue FPHalfs = DAG.getConstantFP(0.5, dl, MVT::v4f64);
10919 SDValue FIdx = DAG.getFrameIndex(FrameIdx, PtrVT);
10921 SDValue Ops[] = {StoreChain,
10930 SDValue Loads[4], LoadChains[4];
10933 SDValue Idx = DAG.getConstant(Offset, dl, FIdx.getValueType());
10943 SDValue Stores[4];
10945 SDValue Idx = DAG.getConstant(i, dl, BasePtr.getValueType());
10959 SDValue PPCTargetLowering::LowerMUL(SDValue Op, SelectionDAG &DAG) const {
10962 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
10964 SDValue Zero = getCanonicalConstSplat(0, 1, MVT::v4i32, DAG, dl);
10966 SDValue Neg16 = getCanonicalConstSplat(-16, 4, MVT::v4i32, DAG, dl);
10967 SDValue RHSSwap = // = vrlw RHS, 16
10977 SDValue LoProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmulouh,
10980 SDValue HiProd = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmsumuhm,
10987 SDValue LHS = Op.getOperand(0), RHS = Op.getOperand(1);
10991 SDValue EvenParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuleub,
10996 SDValue OddParts = BuildIntrinsicOp(Intrinsic::ppc_altivec_vmuloub,
11023 SDValue PPCTargetLowering::LowerABS(SDValue Op, SelectionDAG &DAG) const {
11043 SDValue X = Op.getOperand(0);
11044 SDValue Zero = DAG.getConstant(0, dl, VT);
11045 SDValue Y = DAG.getNode(ISD::SUB, dl, VT, Zero, X);
11062 SDValue PPCTargetLowering::LowerFP_EXTEND(SDValue Op, SelectionDAG &DAG) const {
11071 return SDValue();
11074 SDValue Op0 = Op.getOperand(0);
11078 return SDValue();
11085 return SDValue();
11090 return SDValue();
11106 SDValue NewLoad[2];
11109 SDValue LdOp = Op0.getOperand(i);
11111 return SDValue();
11114 SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr()};
11119 SDValue NewOp =
11127 SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr()};
11128 SDValue NewLd = DAG.getMemIntrinsicNode(
11140 SDValue PPCTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
11195 case ISD::INTRINSIC_W_CHAIN: return SDValue();
11213 SmallVectorImpl<SDValue>&Results,
11221 SDValue RTB = DAG.getNode(PPCISD::READ_TIME_BASE, dl, VTs, N->getOperand(0));
11238 SDValue NewInt = DAG.getNode(N->getOpcode(), dl, VTs, N->getOperand(0),
11252 SDValue NewNode = LowerVAARG(SDValue(N, 1), DAG);
11264 Results.push_back(LowerFP_TO_INT(SDValue(N, 0), DAG, dl));
11273 Results.push_back(LowerTRUNCATEVector(SDValue(N, 0), DAG));
11280 SDValue Lowered = LowerFP_EXTEND(SDValue(N, 0), DAG);
12870 SDValue PPCTargetLowering::getSqrtEstimate(SDValue Operand, SelectionDAG &DAG,
12889 return SDValue();
12892 SDValue PPCTargetLowering::getRecipEstimate(SDValue Operand, SelectionDAG &DAG,
12906 return SDValue();
12934 static void getBaseWithConstantOffset(SDValue Loc, SDValue &Base,
12946 static bool isConsecutiveLSLoc(SDValue Loc, EVT VT, LSBaseSDNode *Base,
12952 SDValue BaseLoc = Base->getBasePtr();
12965 SDValue Base1 = Loc, Base2 = BaseLoc;
12991 SDValue Loc = LS->getBasePtr();
13100 SDValue Chain = LD->getChain();
13166 static SDValue generateEquivalentSub(SDNode *N, int Size, bool Complement,
13198 SDValue PPCTargetLowering::ConvertSETCCToSubtract(SDNode *N,
13208 return SDValue();
13215 return SDValue();
13237 return SDValue();
13240 SDValue PPCTargetLowering::DAGCombineTruncBoolExt(SDNode *N,
13257 return SDValue();
13261 return SDValue();
13275 return SDValue();
13282 : SDValue());
13295 return SDValue();
13311 return SDValue();
13323 return SDValue();
13325 SmallVector<SDValue, 4> Inputs;
13326 SmallVector<SDValue, 8> BinOps, PromOps;
13346 SDValue BinOp = BinOps.back();
13380 return SDValue();
13397 return SDValue();
13406 return SDValue();
13410 return SDValue();
13421 return SDValue();
13430 return SDValue();
13434 return SDValue();
13459 SDValue PromOp = PromOpHandles.back().getValue();
13473 SDValue RepValue = PromOp.getOperand(0);
13500 SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(),
13518 return SDValue(N, 0);
13521 SDValue PPCTargetLowering::DAGCombineExtBoolTrunc(SDNode *N,
13542 return SDValue();
13546 return SDValue();
13553 return SDValue();
13555 SmallVector<SDValue, 4> Inputs;
13556 SmallVector<SDValue, 8> BinOps(1, N->getOperand(0)), PromOps;
13562 SDValue BinOp = BinOps.back();
13589 return SDValue();
13610 return SDValue();
13635 return SDValue();
13689 SDValue InSrc = Inputs[i].getOperand(0);
13712 SDValue PromOp = PromOpHandles.back().getValue();
13747 SmallVector<SDValue, 3> Ops(PromOp.getNode()->op_begin(),
13796 SDValue ShiftCst =
13804 SDValue PPCTargetLowering::combineSetCC(SDNode *N,
13811 SDValue LHS = N->getOperand(0);
13812 SDValue RHS = N->getOperand(1);
13827 SDValue Add = DAG.getNode(ISD::ADD, DL, OpVT, LHS, RHS.getOperand(1));
13836 static bool isFPExtLoad(SDValue Op) {
13850 SDValue PPCTargetLowering::
13859 SDValue FirstInput = N->getOperand(0);
13874 SmallVector<SDValue, 4> Ops;
13877 SDValue NextOp = N->getOperand(i);
13879 return SDValue();
13882 return SDValue();
13888 return SDValue();
13897 return SDValue();
13901 SDValue In = N->getOperand(i).getOperand(0);
13908 SDValue Trunc = DAG.getNode(ISD::FP_ROUND, dl,
13925 SDValue BV = DAG.getBuildVector(NewVT, dl, Ops);
13928 return SDValue();
13937 static SDValue combineBVOfConsecutiveLoads(SDNode *N, SelectionDAG &DAG) {
13945 return SDValue();
13950 SDValue FirstInput = N->getOperand(0);
13961 return SDValue();
13966 return SDValue();
13968 SDValue NextInput = IsRoundOfExtLoad ? N->getOperand(i).getOperand(0) :
13971 return SDValue();
13973 SDValue PreviousInput =
13980 return SDValue();
13989 return SDValue();
13995 SDValue FirstLoadOp =
13997 SDValue LastLoadOp =
14011 SDValue Load = DAG.getLoad(N->getValueType(0), dl, LDL->getChain(),
14021 return SDValue();
14027 static SDValue addShuffleForVecExtend(SDNode *N, SelectionDAG &DAG,
14028 SDValue Input, uint64_t Elems,
14047 SDValue Shuffle =
14052 SDValue Conv = DAG.getBitcast(VT, Shuffle);
14066 static SDValue combineBVOfVecSExt(SDNode *N, SelectionDAG &DAG) {
14087 SDValue Input;
14089 auto isSExtOfVecExtract = [&](SDValue Op) -> bool {
14098 SDValue Extract = Op.getOperand(0);
14126 return SDValue();
14146 return SDValue();
14157 return SDValue();
14160 SDValue PPCTargetLowering::DAGCombineBuildVector(SDNode *N,
14169 return SDValue();
14174 SDValue FirstInput = N->getOperand(0);
14176 SDValue Reduced = combineElementTruncationToVectorTruncation(N, DCI);
14183 SDValue Reduced = combineBVOfConsecutiveLoads(N, DAG);
14199 return SDValue();
14205 return SDValue();
14208 return SDValue();
14210 return SDValue();
14212 SDValue Ext1 = FirstInput.getOperand(0);
14213 SDValue Ext2 = N->getOperand(1).getOperand(0);
14216 return SDValue();
14221 return SDValue();
14224 return SDValue();
14234 return SDValue();
14236 SDValue SrcVec = Ext1.getOperand(0);
14243 SDValue PPCTargetLowering::combineFPToIntToFP(SDNode *N,
14250 return SDValue();
14254 SDValue Op(N, 0);
14259 return SDValue();
14261 return SDValue();
14264 return SDValue();
14266 SDValue FirstOperand(Op.getOperand(0));
14276 SDValue WidthConst =
14280 SDValue Ops[] = { LDN->getChain(), LDN->getBasePtr(), WidthConst };
14281 SDValue Ld = DAG.getMemIntrinsicNode(PPCISD::LXSIZX, dl,
14287 SDValue ExtOps[] = { Ld, WidthConst };
14288 SDValue Ext = DAG.getNode(PPCISD::VEXTS, dl, MVT::f64, ExtOps);
14300 return SDValue();
14321 SDValue Src = Op.getOperand(0).getOperand(0);
14327 return SDValue();
14334 SDValue Tmp = DAG.getNode(FCTOp, dl, MVT::f64, Src);
14335 SDValue FP = DAG.getNode(FCFOp, dl, FCFTy, Tmp);
14346 return SDValue();
14351 SDValue PPCTargetLowering::expandVSXLoadForLE(SDNode *N,
14355 SDValue Chain;
14356 SDValue Base;
14371 return SDValue();
14391 return SDValue();
14394 SDValue LoadOps[] = { Chain, Base };
14395 SDValue Load = DAG.getMemIntrinsicNode(PPCISD::LXVD2X, dl,
14401 SDValue Swap = DAG.getNode(
14407 SDValue N = DAG.getNode(ISD::BITCAST, dl, VecTy, Swap);
14419 SDValue PPCTargetLowering::expandVSXStoreForLE(SDNode *N,
14423 SDValue Chain;
14424 SDValue Base;
14441 return SDValue();
14455 SDValue Src = N->getOperand(SrcOpnd);
14462 return SDValue();
14471 SDValue Swap = DAG.getNode(PPCISD::XXSWAPD, dl,
14475 SDValue StoreOps[] = { Chain, Swap, Base };
14476 SDValue Store = DAG.getMemIntrinsicNode(PPCISD::STXVD2X, dl,
14484 SDValue PPCTargetLowering::combineStoreFPToInt(SDNode *N,
14494 SDValue Val = N->getOperand(1).getOperand(0);
14500 return SDValue();
14509 return SDValue();
14528 SDValue Ops[] = { N->getOperand(0), Val, N->getOperand(2),
14555 static bool isSplatBV(SDValue Op) {
14558 SDValue FirstOp;
14574 static SDValue isScalarToVec(SDValue Op) {
14578 return SDValue();
14582 return SDValue();
14601 static SDValue getSToVPermuted(SDValue OrigSToV, SelectionDAG &DAG) {
14606 SDValue Input = OrigSToV.getOperand(0);
14610 SDValue OrigVector = Input.getOperand(0);
14632 SDValue PPCTargetLowering::combineVectorShuffle(ShuffleVectorSDNode *SVN,
14634 SDValue LHS = SVN->getOperand(0);
14635 SDValue RHS = SVN->getOperand(1);
14638 SDValue Res(SVN, 0);
14660 SDValue SToVLHS = isScalarToVec(LHS);
14661 SDValue SToVRHS = isScalarToVec(RHS);
14738 SDValue SplatVal = cast<BuildVectorSDNode>(RHS.getNode())->getSplatValue();
14745 SDValue PPCTargetLowering::combineVReverseMemOP(ShuffleVectorSDNode *SVN,
14769 return SDValue();
14775 return SDValue();
14778 return SDValue();
14782 SDValue LoadOps[] = {LSBase->getChain(), LSBase->getBasePtr()};
14790 SDValue StoreOps[] = {LSBase->getChain(), SVN->getOperand(0),
14800 SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
14841 if (SDValue CSCC = combineSetCC(N, DCI))
14861 SDValue Val= combineStoreFPToInt(N, DCI);
14868 SDValue Val= combineVReverseMemOP(SVN, cast<LSBaseSDNode>(N), DCI);
14885 SDValue BSwapOp = N->getOperand(1).getOperand(0);
14901 SDValue Ops[] = {
14918 SDValue Const64 = DAG.getConstant(Val64, dl, MVT::i64);
14926 return SDValue(N, 0);
15020 SDValue BasePtr = LD->getBasePtr();
15031 SDValue FloatLoad = DAG.getLoad(MVT::f32, dl, LD->getChain(), BasePtr,
15034 SDValue AddPtr =
15037 SDValue FloatLoad2 = DAG.getLoad(
15038 MVT::f32, dl, SDValue(FloatLoad.getNode(), 1), AddPtr,
15045 DAG.ReplaceAllUsesOfValueWith(SDValue(LD, 1), BasePtr);
15051 DAG.ReplaceAllUsesOfValueWith(SDValue(LD, LD->isIndexed() ? 2 : 1),
15052 SDValue(FloatLoad2.getNode(), 1));
15057 return SDValue(N, 0);
15074 SDValue Chain = LD->getChain();
15075 SDValue Ptr = LD->getBasePtr();
15123 SDValue PermCntl = BuildIntrinsicOp(Intr, Ptr, DAG, dl, PermCntlTy);
15137 SDValue LDXIntID =
15139 SDValue BaseLoadOps[] = { Chain, LDXIntID, Ptr };
15140 SDValue BaseLoad =
15162 SDValue Increment =
15169 SDValue ExtraLoadOps[] = { Chain, LDXIntID, Ptr };
15170 SDValue ExtraLoad =
15175 SDValue TF = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
15183 SDValue Perm;
15202 return SDValue(N, 0);
15215 SDValue Add = N->getOperand(1);
15233 return SDValue(*UI, 0);
15252 return SDValue(*VI, 0);
15266 SDValue V1 = N->getOperand(1);
15267 SDValue V2 = N->getOperand(2);
15328 SDValue Load = N->getOperand(0);
15331 SDValue Ops[] = {
15336 SDValue BSLoad =
15343 SDValue ResVal = BSLoad;
15356 return SDValue(N, 0);
15396 if (User->getOperand(i) == SDValue(VCMPoNode, 1)) {
15406 return SDValue(VCMPoNode, 0);
15410 SDValue Cond = N->getOperand(1);
15411 SDValue Target = N->getOperand(2);
15434 SDValue LHS = N->getOperand(2), RHS = N->getOperand(3);
15489 SDValue Ops[] = {
15495 SDValue CompNode = DAG.getNode(PPCISD::VCMPo, dl, VTs, Ops);
15530 return SDValue();
15533 SDValue
15540 return SDValue();
15543 return SDValue();
15546 SDValue N0 = N->getOperand(0);
15550 SDValue ShiftAmt = DAG.getConstant(Lg2, DL, VT);
15552 SDValue Op = DAG.getNode(PPCISD::SRA_ADDZE, DL, VT, N0, ShiftAmt);
15567 void PPCTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
15845 void PPCTargetLowering::LowerAsmOperandForConstraint(SDValue Op,
15847 std::vector<SDValue>&Ops,
15849 SDValue Result;
15958 SDValue PPCTargetLowering::LowerRETURNADDR(SDValue Op,
15965 return SDValue();
15978 SDValue FrameAddr = LowerFRAMEADDR(Op, DAG);
15979 SDValue Offset =
15988 SDValue RetAddrFI = getReturnAddrFrameIndex(DAG);
15993 SDValue PPCTargetLowering::LowerFRAMEADDR(SDValue Op,
16013 SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg,
16042 bool PPCTargetLowering::isAccessedAsGotIndirect(SDValue GA) const {
16312 bool PPCTargetLowering::isZExtFree(SDValue Val, EVT VT2) const {
16497 SDValue PPCTargetLowering::getNegatedExpression(SDValue Op, SelectionDAG &DAG,
16502 return SDValue();
16515 SDValue N0 = Op.getOperand(0);
16516 SDValue N1 = Op.getOperand(1);
16517 SDValue N2 = Op.getOperand(2);
16521 SDValue NegN2 =
16525 return SDValue();
16534 SDValue NegN0 = getNegatedExpression(N0, DAG, LegalOps, OptForSize,
16538 SDValue NegN1 = getNegatedExpression(N1, DAG, LegalOps, OptForSize,
16602 static SDValue stripModuloOnShift(const TargetLowering &TLI, SDNode *N,
16604 SDValue N0 = N->getOperand(0);
16605 SDValue N1 = N->getOperand(1);
16631 return SDValue();
16634 SDValue PPCTargetLowering::combineSHL(SDNode *N, DAGCombinerInfo &DCI) const {
16638 SDValue N0 = N->getOperand(0);
16644 return SDValue();
16648 SDValue ExtsSrc = N0.getOperand(0);
16651 return SDValue();
16654 SDValue ShiftBy = SDValue(CN1, 0);
16664 SDValue PPCTargetLowering::combineSRA(SDNode *N, DAGCombinerInfo &DCI) const {
16668 return SDValue();
16671 SDValue PPCTargetLowering::combineSRL(SDNode *N, DAGCombinerInfo &DCI) const {
16675 return SDValue();
16682 static SDValue combineADDToADDZE(SDNode *N, SelectionDAG &DAG,
16685 return SDValue();
16687 SDValue LHS = N->getOperand(0);
16688 SDValue RHS = N->getOperand(1);
16690 auto isZextOfCompareWithConstant = [](SDValue Op) {
16695 SDValue Cmp = Op.getOperand(0);
16717 return SDValue();
16721 SDValue Cmp = RHS.getOperand(0);
16722 SDValue Z = Cmp.getOperand(0);
16737 SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Z,
16739 SDValue AddOrZ = NegConstant != 0 ? Add : Z;
16740 SDValue Addc = DAG.getNode(ISD::ADDC, DL, DAG.getVTList(MVT::i64, MVT::Glue),
16743 SDValue(Addc.getNode(), 1));
16752 SDValue Add = DAG.getNode(ISD::ADD, DL, MVT::i64, Z,
16754 SDValue AddOrZ = NegConstant != 0 ? Add : Z;
16755 SDValue Subc = DAG.getNode(ISD::SUBC, DL, DAG.getVTList(MVT::i64, MVT::Glue),
16758 SDValue(Subc.getNode(), 1));
16762 return SDValue();
16770 static SDValue combineADDToMAT_PCREL_ADDR(SDNode *N, SelectionDAG &DAG,
16773 return SDValue();
16777 SDValue LHS = N->getOperand(0);
16778 SDValue RHS = N->getOperand(1);
16784 return SDValue();
16792 return SDValue();
16799 return SDValue();
16803 SDValue GA =
16806 SDValue MatPCRel =
16811 SDValue PPCTargetLowering::combineADD(SDNode *N, DAGCombinerInfo &DCI) const {
16818 return SDValue();
16830 SDValue PPCTargetLowering::combineTRUNCATE(SDNode *N,
16835 if (SDValue CRTruncValue = DAGCombineTruncBoolExt(N, DCI))
16840 SDValue Op0 = N->getOperand(0);
16846 return SDValue();
16847 SDValue Sub = Op0.getOperand(0);
16849 SDValue SubOp0 = Sub.getOperand(0);
16850 SDValue SubOp1 = Sub.getOperand(1);
16862 return SDValue();
16871 return SDValue();
16883 SDValue Bitcast = DCI.DAG.getBitcast(MVT::v2i64, Op0.getOperand(0));
16888 return SDValue();
16891 SDValue PPCTargetLowering::combineMUL(SDNode *N, DAGCombinerInfo &DCI) const {
16896 return SDValue();
16901 return SDValue();
16942 return SDValue();
16944 SDValue Op0 = N->getOperand(0);
16945 SDValue Op1 =
16948 SDValue Res = DAG.getNode(ISD::ADD, DL, VT, Op0, Op1);
16959 return SDValue();
16961 SDValue Op0 = N->getOperand(0);
16962 SDValue Op1 =
16972 return SDValue();
16978 SDValue PPCTargetLowering::combineFMALike(SDNode *N,
16980 SDValue N0 = N->getOperand(0);
16981 SDValue N1 = N->getOperand(1);
16982 SDValue N2 = N->getOperand(2);
16994 return SDValue();
16999 return SDValue();
17003 if (SDValue NegN0 = getCheaperNegatedExpression(N0, DAG, LegalOps, CodeSize))
17008 if (SDValue NegN1 = getCheaperNegatedExpression(N1, DAG, LegalOps, CodeSize))
17011 return SDValue();
17075 SDValue PPCTargetLowering::combineABS(SDNode *N, DAGCombinerInfo &DCI) const {
17081 return SDValue();
17110 return SDValue();
17118 SDValue PPCTargetLowering::combineVSelect(SDNode *N,
17126 SDValue Cond = N->getOperand(0);
17127 SDValue TrueOpnd = N->getOperand(1);
17128 SDValue FalseOpnd = N->getOperand(2);
17133 return SDValue();
17137 return SDValue();
17141 return SDValue();
17148 return SDValue();
17158 SDValue CmpOpnd1 = Cond.getOperand(0);
17159 SDValue CmpOpnd2 = Cond.getOperand(1);
17173 return SDValue();