Lines Matching refs:CC
220 SDValue SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2515 SDValue get32BitZExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2517 SDValue get32BitSExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2519 SDValue get64BitZExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2521 SDValue get64BitSExtCompare(SDValue LHS, SDValue RHS, ISD::CondCode CC,
2922 ISD::CondCode CC,
2930 switch (CC) {
3095 ISD::CondCode CC,
3104 switch (CC) {
3267 ISD::CondCode CC,
3275 switch (CC) {
3424 ISD::CondCode CC,
3432 switch (CC) {
3624 ISD::CondCode CC =
3632 CC = ISD::getSetCCInverse(CC, InputVT);
3643 return get32BitSExtCompare(LHS, RHS, CC, RHSValue, dl);
3645 return get32BitZExtCompare(LHS, RHS, CC, RHSValue, dl);
3647 return get64BitSExtCompare(LHS, RHS, CC, RHSValue, dl);
3648 return get64BitZExtCompare(LHS, RHS, CC, RHSValue, dl);
3710 SDValue PPCDAGToDAGISel::SelectCC(SDValue LHS, SDValue RHS, ISD::CondCode CC,
3717 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
3745 } else if (ISD::isUnsignedIntSetCC(CC)) {
3761 if (CC == ISD::SETEQ || CC == ISD::SETNE) {
3792 } else if (ISD::isUnsignedIntSetCC(CC)) {
3807 switch (CC) {
3834 switch (CC) {
3867 static PPC::Predicate getPredicateForSetCC(ISD::CondCode CC, const EVT &VT,
3872 switch (CC) {
3908 static unsigned getCRIdxForSetCC(ISD::CondCode CC, bool &Invert) {
3910 switch (CC) {
3940 static unsigned int getVCmpInst(MVT VecVT, ISD::CondCode CC,
3947 switch (CC) {
3948 case ISD::SETLE: CC = ISD::SETGE; Swap = true; break;
3949 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break;
3950 case ISD::SETOLE: CC = ISD::SETOGE; Swap = true; break;
3951 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break;
3952 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
3953 case ISD::SETUGT: CC = ISD::SETULT; Swap = true; break;
3957 switch (CC) {
3958 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
3959 case ISD::SETUNE: CC = ISD::SETOEQ; Negate = true; break;
3960 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break;
3961 case ISD::SETULT: CC = ISD::SETOGE; Negate = true; break;
3965 switch (CC) {
3993 switch (CC) {
3994 case ISD::SETGE: CC = ISD::SETLE; Swap = true; break;
3995 case ISD::SETLT: CC = ISD::SETGT; Swap = true; break;
3996 case ISD::SETUGE: CC = ISD::SETULE; Swap = true; break;
3997 case ISD::SETULT: CC = ISD::SETUGT; Swap = true; break;
4001 switch (CC) {
4002 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break;
4003 case ISD::SETUNE: CC = ISD::SETUEQ; Negate = true; break;
4004 case ISD::SETLE: CC = ISD::SETGT; Negate = true; break;
4005 case ISD::SETULE: CC = ISD::SETUGT; Negate = true; break;
4009 switch (CC) {
4051 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(2))->get();
4062 switch (CC) {
4097 switch (CC) {
4151 getVCmpInst(VecVT.getSimpleVT(), CC, Subtarget->hasVSX(), Swap, Negate);
4171 unsigned Idx = getCRIdxForSetCC(CC, Inv);
4172 SDValue CCReg = SelectCC(LHS, RHS, CC, dl);
4248 static bool mayUseP9Setb(SDNode *N, const ISD::CondCode &CC, SelectionDAG *DAG,
4272 (FalseRes.getOpcode() != ISD::SELECT_CC || CC != ISD::SETEQ)))
4326 switch (CC) {
4989 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(4))->get();
5001 if (mayUseP9Setb(N, CC, CurDAG, NeedSwapOps, IsUnCmp)) {
5029 N2C->getZExtValue() == 1ULL && CC == ISD::SETNE &&
5040 SDValue CCReg = SelectCC(N->getOperand(0), N->getOperand(1), CC, dl);
5045 unsigned Idx = getCRIdxForSetCC(CC, Inv);
5049 default: llvm_unreachable("Invalid CC index");
5073 getPredicateForSetCC(CC, N->getOperand(0).getValueType(), Subtarget);
5195 ISD::CondCode CC = cast<CondCodeSDNode>(N->getOperand(1))->get();
5197 getPredicateForSetCC(CC, N->getOperand(2).getValueType(), Subtarget);
5218 if (ISD::isSignedIntSetCC(CC))
5232 SDValue CondCode = SelectCC(N->getOperand(2), N->getOperand(3), CC, dl);
5450 ISD::CondCode CC = cast<CondCodeSDNode>(O.getOperand(4))->get();
5478 Op0.getOperand(1) == Op1.getOperand(1) && CC == ISD::SETEQ &&
5500 if (Op0.getOpcode() == ISD::XOR && CC == ISD::SETULT &&
5522 if (CC != ISD::SETEQ)