Lines Matching refs:SrcVT
173 bool PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
830 MVT SrcVT = SrcEVT.getSimpleVT();
832 if (SrcVT == MVT::i1 && Subtarget->useCRBits())
846 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 ||
847 SrcVT == MVT::i8 || SrcVT == MVT::i1) {
872 switch (SrcVT.SimpleTy) {
937 if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt))
943 if (!PPCEmitIntExt(SrcVT, SrcReg2, MVT::i32, ExtReg, IsZExt))
962 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
965 if (SrcVT != MVT::f32 || DestVT != MVT::f64)
980 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
983 if (SrcVT != MVT::f64 || DestVT != MVT::f32)
1021 unsigned PPCFastISel::PPCMoveToFPReg(MVT SrcVT, unsigned SrcReg,
1025 if (SrcVT == MVT::i32) {
1045 if (SrcVT == MVT::i32) {
1080 MVT SrcVT = SrcEVT.getSimpleVT();
1082 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 &&
1083 SrcVT != MVT::i32 && SrcVT != MVT::i64)
1120 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) {
1122 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned))
1124 SrcVT = MVT::i64;
1129 unsigned FPReg = PPCMoveToFPReg(SrcVT, SrcReg, IsSigned);
1192 MVT DstVT, SrcVT;
1207 if (!isTypeLegal(SrcTy, SrcVT))
1210 if (SrcVT != MVT::f32 && SrcVT != MVT::f64)
1804 bool PPCFastISel::PPCEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT,
1808 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 && SrcVT != MVT::i32)
1814 if (SrcVT == MVT::i8)
1816 else if (SrcVT == MVT::i16)
1828 if (SrcVT == MVT::i8)
1831 assert(SrcVT == MVT::i16 && "Unsigned extend from i32 to i32??");
1841 if (SrcVT == MVT::i8)
1843 else if (SrcVT == MVT::i16)
1875 EVT SrcVT = TLI.getValueType(DL, Src->getType(), true);
1878 if (SrcVT != MVT::i64 && SrcVT != MVT::i32 && SrcVT != MVT::i16)
1889 if (SrcVT == MVT::i64)
1914 MVT SrcVT = SrcEVT.getSimpleVT();
1928 if (!PPCEmitIntExt(SrcVT, SrcReg, DestVT, ResultReg, IsZExt))