Lines Matching refs:Base
75 } Base;
82 Base.Reg = 0;
397 Addr.Base.FI = SI->second;
411 if (Addr.Base.Reg == 0)
412 Addr.Base.Reg = getRegForValue(Obj);
416 if (Addr.Base.Reg != 0)
417 MRI.setRegClass(Addr.Base.Reg, &PPC::G8RC_and_G8RC_NOX0RegClass);
419 return Addr.Base.Reg != 0;
438 ResultReg).addFrameIndex(Addr.Base.FI).addImm(0);
439 Addr.Base.Reg = ResultReg;
537 MachinePointerInfo::getFixedStack(*FuncInfo.MF, Addr.Base.FI,
539 MachineMemOperand::MOLoad, MFI.getObjectSize(Addr.Base.FI),
540 MFI.getObjectAlign(Addr.Base.FI));
543 .addImm(Addr.Offset).addFrameIndex(Addr.Base.FI).addMemOperand(MMO);
545 // Base reg with offset in range.
551 .addImm(Addr.Offset).addReg(Addr.Base.Reg);
585 MIB.addReg(Addr.Base.Reg).addReg(IndexReg);
587 MIB.addReg(PPC::ZERO8).addReg(Addr.Base.Reg);
683 MachinePointerInfo::getFixedStack(*FuncInfo.MF, Addr.Base.FI,
685 MachineMemOperand::MOStore, MFI.getObjectSize(Addr.Base.FI),
686 MFI.getObjectAlign(Addr.Base.FI));
691 .addFrameIndex(Addr.Base.FI)
694 // Base reg with offset in range.
701 .addReg(SrcReg).addImm(Addr.Offset).addReg(Addr.Base.Reg);
731 MIB.addReg(Addr.Base.Reg).addReg(IndexReg);
733 MIB.addReg(PPC::ZERO8).addReg(Addr.Base.Reg);
1035 Addr.Base.FI = MFI.CreateStackObject(8, Align(8), false);
1164 Addr.Base.FI = MFI.CreateStackObject(8, Align(8), false);