Lines Matching defs:DL
85 const DebugLoc &DL, MCRegister DestReg,
111 BuildMI(MBB, I, DL, get(Mips::RDDSP), DestReg).addImm(1 << 4)
132 BuildMI(MBB, I, DL, get(Mips::WRDSP))
137 BuildMI(MBB, I, DL, get(Mips::CTCMSA))
174 MachineInstrBuilder MIB = BuildMI(MBB, I, DL, get(Opc));
249 DebugLoc DL;
299 BuildMI(MBB, I, DL, get(Mips::MFHI), Mips::K0);
302 BuildMI(MBB, I, DL, get(Mips::MFHI64), Mips::K0_64);
305 BuildMI(MBB, I, DL, get(Mips::MFLO), Mips::K0);
308 BuildMI(MBB, I, DL, get(Mips::MFLO64), Mips::K0_64);
314 BuildMI(MBB, I, DL, get(Opc)).addReg(SrcReg, getKillRegState(isKill))
322 DebugLoc DL;
323 if (I != MBB.end()) DL = I->getDebugLoc();
375 BuildMI(MBB, I, DL, get(Opc), DestReg)
395 BuildMI(MBB, I, DL, get(Opc), Reg)
399 BuildMI(MBB, I, DL, get(LdOp)).addReg(Reg);
593 DebugLoc DL;
601 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount);
610 unsigned Reg = loadImmediate(Amount, MBB, I, DL, nullptr);
611 BuildMI(MBB, I, DL, get(Opc), SP).addReg(SP).addReg(Reg, RegState::Kill);
619 const DebugLoc &DL,
643 BuildMI(MBB, II, DL, get(LUi), Reg).addImm(SignExtend64<16>(Inst->ImmOpnd));
645 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(ZEROReg)
650 BuildMI(MBB, II, DL, get(Inst->Opc), Reg).addReg(Reg, RegState::Kill)
738 DebugLoc DL = I->getDebugLoc();
740 MachineInstrBuilder LoInst = BuildMI(MBB, I, DL, get(LoOpc));
741 MachineInstrBuilder HiInst = BuildMI(MBB, I, DL, get(HiOpc));
765 DebugLoc DL = I->getDebugLoc();
777 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);
778 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);