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  • only in /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/

Lines Matching refs:getDebugLoc

261       BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opc))
275 BuildMI(*I.getParent(), I, I.getDebugLoc(), TII.get(Opc))
301 MachineInstr *Mul = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MUL))
325 PseudoMULTu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoMULTu))
332 PseudoMove = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoMFHI))
342 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))
354 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
361 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::BNE))
374 MachineInstr *SLL = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SLL))
382 MachineInstr *ADDu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))
391 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
403 MachineInstr *ADDu = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDu))
413 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoIndirectBranch))
422 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::PseudoIndirectBranch))
481 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::IMPLICIT_DEF))
501 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(NewOpc))
517 PseudoDIV = BuildMI(MBB, I, I.getDebugLoc(),
525 PseudoMove = BuildMI(MBB, I, I.getDebugLoc(),
537 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MOVN_I_I))
557 MachineInstr *ExtractLo = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Opcode))
564 MachineInstr *ExtractHi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Opcode))
576 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::IMPLICIT_DEF))
632 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(FABSOpcode))
651 MachineInstr *Trunc = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Opcode))
657 MachineInstr *Move = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::MFC1))
669 MachineInstr *LWGOT = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
693 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
704 MachineInstr *LUi = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
712 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
725 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LW))
735 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LUi))
872 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu))
881 MachineInstr *FCMP = BuildMI(MBB, I, I.getDebugLoc(), TII.get(FCMPOpcode))
888 MachineInstr *Move = BuildMI(MBB, I, I.getDebugLoc(), TII.get(MoveOpcode))
900 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SYNC)).addImm(0);
909 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::LEA_ADDiu))
916 MachineInstr *Store = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::SW))