Lines Matching refs:Pos
161 MachineBasicBlock::iterator Pos, DebugLoc DL);
375 MachineBasicBlock::iterator Pos,
396 BuildMI(*MBB, Pos, DL, TII->get(JumpOp)).addReg(ATReg);
409 MachineBasicBlock::iterator Pos;
463 Pos = LongBrMBB->begin();
465 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
468 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SW))
489 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi), Mips::AT)
501 LongBrMBB->insert(Pos, ADDiuInstr);
502 LongBrMBB->insert(Pos, BalInstr);
504 LongBrMBB->insert(Pos, BalInstr);
505 LongBrMBB->insert(Pos, ADDiuInstr);
509 Pos = BalTgtMBB->begin();
511 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDu), Mips::AT)
514 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LW), Mips::RA)
523 bool hasDelaySlot = buildProperJumpMI(BalTgtMBB, Pos, DL);
526 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP)
532 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::NOP));
534 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP)
586 Pos = LongBrMBB->begin();
588 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64)
591 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::SD))
595 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu),
600 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
612 LongBrMBB->insert(Pos, DADDiuInstr);
613 LongBrMBB->insert(Pos, BalInstr);
615 LongBrMBB->insert(Pos, BalInstr);
616 LongBrMBB->insert(Pos, DADDiuInstr);
620 Pos = BalTgtMBB->begin();
622 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDu), Mips::AT_64)
625 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::LD), Mips::RA_64)
629 bool hasDelaySlot = buildProperJumpMI(BalTgtMBB, Pos, DL);
632 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::DADDiu),
637 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::DADDiu), Mips::SP_64)
644 Pos = LongBrMBB->begin();
665 BuildMI(*LongBrMBB, Pos, DL,
675 MIBundleBuilder(*LongBrMBB, Pos)
685 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op_64),
688 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op),
692 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
695 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op),
699 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::DSLL), Mips::AT_64)
702 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_DADDiu2Op),
707 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_LUi2Op),
710 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::LONG_BRANCH_ADDiu2Op),
715 buildProperJumpMI(LongBrMBB, Pos, DL);