Lines Matching refs:MCInst
1 //===-- MipsAsmParser.cpp - Parse Mips assembly to MCInst instructions ----===//
26 #include "llvm/MC/MCInst.h"
165 void ConvertXWPOperands(MCInst &Inst, const OperandVector &Operands);
171 checkEarlyTargetMatchPredicate(MCInst &Inst,
173 unsigned checkTargetMatchPredicate(MCInst &Inst) override;
222 MacroExpanderResultTy tryExpandInstruction(MCInst &Inst, SMLoc IDLoc,
226 bool expandJalWithRegs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
239 bool expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
242 bool expandLoadSingleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
244 bool expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
246 bool expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
248 bool expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU, SMLoc IDLoc,
256 bool expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
259 void expandMem16Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
261 void expandMem9Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
264 bool expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
267 bool expandAliasImmediate(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
270 bool expandBranchImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
273 bool expandCondBranches(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
276 bool expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
280 bool expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU, SMLoc IDLoc,
283 bool expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc, MCStreamer &Out,
286 bool expandUsh(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
289 bool expandUxw(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
292 bool expandSge(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
295 bool expandSgeImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
298 bool expandSgtImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
301 bool expandSle(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
304 bool expandSleImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
307 bool expandRotation(MCInst &Inst, SMLoc IDLoc,
309 bool expandRotationImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
311 bool expandDRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
313 bool expandDRotationImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
316 bool expandAbs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
319 bool expandMulImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
322 bool expandMulO(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
325 bool expandMulOU(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
328 bool expandDMULMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
331 bool expandLoadStoreDMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
334 bool expandStoreDM1Macro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
337 bool expandSeq(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
340 bool expandSeqI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
343 bool expandSne(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
346 bool expandSneI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
349 bool expandMXTRAlias(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
352 bool expandSaaAddr(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
442 bool processInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
1048 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
1058 void addRegOperands(MCInst &Inst, unsigned N) const {
1062 /// Render the operand to an MCInst as a GPR32
1065 void addGPR32ZeroAsmRegOperands(MCInst &Inst, unsigned N) const {
1070 void addGPR32NonZeroAsmRegOperands(MCInst &Inst, unsigned N) const {
1075 void addGPR32AsmRegOperands(MCInst &Inst, unsigned N) const {
1080 void addGPRMM16AsmRegOperands(MCInst &Inst, unsigned N) const {
1085 void addGPRMM16AsmRegZeroOperands(MCInst &Inst, unsigned N) const {
1090 void addGPRMM16AsmRegMovePOperands(MCInst &Inst, unsigned N) const {
1095 void addGPRMM16AsmRegMovePPairFirstOperands(MCInst &Inst, unsigned N) const {
1100 void addGPRMM16AsmRegMovePPairSecondOperands(MCInst &Inst,
1106 /// Render the operand to an MCInst as a GPR64
1109 void addGPR64AsmRegOperands(MCInst &Inst, unsigned N) const {
1114 void addAFGR64AsmRegOperands(MCInst &Inst, unsigned N) const {
1119 void addStrictlyAFGR64AsmRegOperands(MCInst &Inst, unsigned N) const {
1124 void addStrictlyFGR64AsmRegOperands(MCInst &Inst, unsigned N) const {
1129 void addFGR64AsmRegOperands(MCInst &Inst, unsigned N) const {
1134 void addFGR32AsmRegOperands(MCInst &Inst, unsigned N) const {
1145 void addStrictlyFGR32AsmRegOperands(MCInst &Inst, unsigned N) const {
1154 void addFCCAsmRegOperands(MCInst &Inst, unsigned N) const {
1159 void addMSA128AsmRegOperands(MCInst &Inst, unsigned N) const {
1164 void addMSACtrlAsmRegOperands(MCInst &Inst, unsigned N) const {
1169 void addCOP0AsmRegOperands(MCInst &Inst, unsigned N) const {
1174 void addCOP2AsmRegOperands(MCInst &Inst, unsigned N) const {
1179 void addCOP3AsmRegOperands(MCInst &Inst, unsigned N) const {
1184 void addACC64DSPAsmRegOperands(MCInst &Inst, unsigned N) const {
1189 void addHI32DSPAsmRegOperands(MCInst &Inst, unsigned N) const {
1194 void addLO32DSPAsmRegOperands(MCInst &Inst, unsigned N) const {
1199 void addCCRAsmRegOperands(MCInst &Inst, unsigned N) const {
1204 void addHWRegsAsmRegOperands(MCInst &Inst, unsigned N) const {
1210 void addConstantUImmOperands(MCInst &Inst, unsigned N) const {
1220 void addSImmOperands(MCInst &Inst, unsigned N) const {
1229 void addUImmOperands(MCInst &Inst, unsigned N) const {
1238 void addConstantSImmOperands(MCInst &Inst, unsigned N) const {
1247 void addImmOperands(MCInst &Inst, unsigned N) const {
1253 void addMemOperands(MCInst &Inst, unsigned N) const {
1264 void addMicroMipsMemOperands(MCInst &Inst, unsigned N) const {
1273 void addRegListOperands(MCInst &Inst, unsigned N) const {
1758 static bool hasShortDelaySlot(MCInst &Inst) {
1838 static bool needsExpandMemInst(MCInst &Inst) {
1872 bool MipsAsmParser::processInstruction(MCInst &Inst, SMLoc IDLoc,
2099 MCInst BInst;
2127 MCInst JalrInst;
2373 MipsAsmParser::tryExpandInstruction(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
2635 bool MipsAsmParser::expandJalWithRegs(MCInst &Inst, SMLoc IDLoc,
2641 MCInst JalrInst;
2862 bool MipsAsmParser::expandLoadImm(MCInst &Inst, bool Is32BitImm, SMLoc IDLoc,
3358 bool MipsAsmParser::expandLoadSingleImmToGPR(MCInst &Inst, SMLoc IDLoc,
3374 bool MipsAsmParser::expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc,
3428 bool MipsAsmParser::expandLoadDoubleImmToGPR(MCInst &Inst, SMLoc IDLoc,
3493 bool MipsAsmParser::expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU,
3566 bool MipsAsmParser::expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
3611 bool MipsAsmParser::expandBranchImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
3677 void MipsAsmParser::expandMem16Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
3804 void MipsAsmParser::expandMem9Inst(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
3862 bool MipsAsmParser::expandLoadStoreMultiple(MCInst &Inst, SMLoc IDLoc,
3891 bool MipsAsmParser::expandCondBranches(MCInst &Inst, SMLoc IDLoc,
4162 bool MipsAsmParser::expandDivRem(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4333 bool MipsAsmParser::expandTrunc(MCInst &Inst, bool IsDouble, bool Is64FPU,
4372 bool MipsAsmParser::expandUlh(MCInst &Inst, bool Signed, SMLoc IDLoc,
4424 bool MipsAsmParser::expandUsh(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4475 bool MipsAsmParser::expandUxw(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4530 bool MipsAsmParser::expandSge(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4564 bool MipsAsmParser::expandSgeImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4620 bool MipsAsmParser::expandSgtImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4667 bool MipsAsmParser::expandSle(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4701 bool MipsAsmParser::expandSleImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4749 bool MipsAsmParser::expandAliasImmediate(MCInst &Inst, SMLoc IDLoc,
4856 bool MipsAsmParser::expandRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
4918 bool MipsAsmParser::expandRotationImm(MCInst &Inst, SMLoc IDLoc,
4981 bool MipsAsmParser::expandDRotation(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5043 bool MipsAsmParser::expandDRotationImm(MCInst &Inst, SMLoc IDLoc,
5055 MCInst TmpInst;
5138 bool MipsAsmParser::expandAbs(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5154 bool MipsAsmParser::expandMulImm(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5177 bool MipsAsmParser::expandMulO(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5219 bool MipsAsmParser::expandMulOU(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5255 bool MipsAsmParser::expandDMULMacro(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5273 bool MipsAsmParser::expandLoadStoreDMacro(MCInst &Inst, SMLoc IDLoc,
5321 bool MipsAsmParser::expandStoreDM1Macro(MCInst &Inst, SMLoc IDLoc,
5358 bool MipsAsmParser::expandSeq(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5384 bool MipsAsmParser::expandSeqI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5438 bool MipsAsmParser::expandSne(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5465 bool MipsAsmParser::expandSneI(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5523 static unsigned getRegisterForMxtrDSP(MCInst &Inst, bool IsMFDSP) {
5577 static unsigned getRegisterForMxtrFP(MCInst &Inst, bool IsMFTC1) {
5616 static unsigned getRegisterForMxtrC0(MCInst &Inst, bool IsMFTC0) {
5656 bool MipsAsmParser::expandMXTRAlias(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5726 bool MipsAsmParser::expandSaaAddr(MCInst &Inst, SMLoc IDLoc, MCStreamer &Out,
5760 MipsAsmParser::checkEarlyTargetMatchPredicate(MCInst &Inst,
5774 unsigned MipsAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
5930 MCInst Inst;
6135 void MipsAsmParser::ConvertXWPOperands(MCInst &Inst,
6945 // First operand in MCInst is instruction mnemonic.