Lines Matching refs:Bits
1209 template <unsigned Bits, int Offset = 0, int AdjustOffset = 0>
1213 Imm &= (1ULL << Bits) - 1;
1219 template <unsigned Bits>
1225 addConstantSImmOperands<Bits, 0, 0>(Inst, N);
1228 template <unsigned Bits>
1234 addConstantUImmOperands<Bits, 0, 0>(Inst, N);
1237 template <unsigned Bits, int Offset = 0, int AdjustOffset = 0>
1241 Imm = SignExtend64<Bits>(Imm);
1298 template <unsigned Bits, int Offset = 0> bool isConstantUImm() const {
1299 return isConstantImm() && isUInt<Bits>(getConstantImm() - Offset);
1302 template <unsigned Bits> bool isSImm() const {
1303 return isConstantImm() ? isInt<Bits>(getConstantImm()) : isImm();
1306 template <unsigned Bits> bool isUImm() const {
1307 return isConstantImm() ? isUInt<Bits>(getConstantImm()) : isImm();
1310 template <unsigned Bits> bool isAnyImm() const {
1311 return isConstantImm() ? (isInt<Bits>(getConstantImm()) ||
1312 isUInt<Bits>(getConstantImm()))
1316 template <unsigned Bits, int Offset = 0> bool isConstantSImm() const {
1317 return isConstantImm() && isInt<Bits>(getConstantImm() - Offset);
1338 template <unsigned Bits, unsigned ShiftAmount = 0>
1346 isShiftedInt<Bits, ShiftAmount>(getConstantMemOff())))
1350 return IsReloc && isShiftedInt<Bits, ShiftAmount>(Res.getConstant());
1371 template <unsigned Bits> bool isMemWithUimmOffsetSP() const {
1372 return isMem() && isConstantMemOff() && isUInt<Bits>(getConstantMemOff())
1376 template <unsigned Bits> bool isMemWithUimmWordAlignedOffsetSP() const {
1377 return isMem() && isConstantMemOff() && isUInt<Bits>(getConstantMemOff())
1382 template <unsigned Bits> bool isMemWithSimmWordAlignedOffsetGP() const {
1383 return isMem() && isConstantMemOff() && isInt<Bits>(getConstantMemOff())
1388 template <unsigned Bits, unsigned ShiftLeftAmount>
1391 isShiftedUInt<Bits, ShiftLeftAmount>(getConstantImm());
1394 template <unsigned Bits, unsigned ShiftLeftAmount>
1397 isShiftedInt<Bits, ShiftLeftAmount>(getConstantImm()))
1405 return Success && isShiftedInt<Bits, ShiftLeftAmount>(Res.getConstant());
2815 uint16_t Bits = (ImmValue >> ShiftAmount) & 0xffff;
2816 TOut.emitRRI(Mips::ORi, TmpReg, ZeroReg, Bits, IDLoc, STI);