Lines Matching refs:MCInst
22 #include "llvm/MC/MCInst.h"
51 uint64_t getBinaryCodeForInstr(const MCInst &Inst,
57 unsigned getMachineOpValue(const MCInst &Inst, const MCOperand &MCOp,
61 unsigned getRiMemoryOpValue(const MCInst &Inst, unsigned OpNo,
65 unsigned getRrMemoryOpValue(const MCInst &Inst, unsigned OpNo,
69 unsigned getSplsOpValue(const MCInst &Inst, unsigned OpNo,
73 unsigned getBranchTargetOpValue(const MCInst &Inst, unsigned OpNo,
77 void encodeInstruction(const MCInst &Inst, raw_ostream &Ostream,
81 unsigned adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value,
84 unsigned adjustPqBitsSpls(const MCInst &Inst, unsigned Value,
110 const MCInst &Inst, const MCOperand &MCOp, SmallVectorImpl<MCFixup> &Fixups,
135 static unsigned adjustPqBits(const MCInst &Inst, unsigned Value,
161 LanaiMCCodeEmitter::adjustPqBitsRmAndRrm(const MCInst &Inst, unsigned Value,
167 LanaiMCCodeEmitter::adjustPqBitsSpls(const MCInst &Inst, unsigned Value,
173 const MCInst &Inst, raw_ostream &Ostream, SmallVectorImpl<MCFixup> &Fixups,
186 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,
218 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,
256 LanaiMCCodeEmitter::getSplsOpValue(const MCInst &Inst, unsigned OpNo,
289 const MCInst &Inst, unsigned OpNo, SmallVectorImpl<MCFixup> &Fixups,