Lines Matching refs:HexagonMCInstrInfo
13 #include "MCTargetDesc/HexagonMCInstrInfo.h"
342 bool Duplex = HexagonMCInstrInfo::isDuplex(MCII, MCI);
344 if (HexagonMCInstrInfo::isInnerLoop(MCB)) {
351 if (HexagonMCInstrInfo::isOuterLoop(MCB)) {
372 assert(HexagonMCInstrInfo::isBundle(HMB));
378 size_t Last = HexagonMCInstrInfo::bundleSize(HMB) - 1;
381 for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) {
386 State.Extended = HexagonMCInstrInfo::isImmext(HMI);
395 HexagonMCInstrInfo::IsSingleConsumerRefPairProducer(Producer,
403 assert(!HexagonMCInstrInfo::isBundle(MI));
408 assert(!HexagonMCInstrInfo::getDesc(MCII, MI).isPseudo() &&
411 << HexagonMCInstrInfo::getName(MCII, MI) << "'\n");
420 << HexagonMCInstrInfo::getName(MCII, MI) << "'\n");
465 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
466 unsigned InsnType = HexagonMCInstrInfo::getType(MCII, MI);
471 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle);
477 const MCInstrDesc &NextD = HexagonMCInstrInfo::getDesc(MCII, NextI);
479 HexagonMCInstrInfo::getType(MCII, NextI) == HexagonII::TypeCR)
582 ME = &HexagonMCInstrInfo::getExpr(*ME);
585 bool InstExtendable = HexagonMCInstrInfo::isExtendable(MCII, MI) ||
586 HexagonMCInstrInfo::isExtended(MCII, MI);
590 bool IsSub0 = HexagonMCInstrInfo::isSubInstruction(MI) && !State.SubInst1;
600 if (OpIdx == HexagonMCInstrInfo::getExtendableOp(MCII, MI)) {
601 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MI);
618 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
619 unsigned FixupWidth = HexagonMCInstrInfo::getExtentBits(MCII, MI) -
620 HexagonMCInstrInfo::getExtentAlignment(MCII, MI);
623 unsigned IType = HexagonMCInstrInfo::getType(MCII, MI);
626 << "Opcode Name: " << HexagonMCInstrInfo::getName(MCII, MI)
637 if (HexagonMCInstrInfo::s27_2_reloc(*MO.getExpr())) {
642 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MI);
675 FixupKind = HexagonMCInstrInfo::isExtentSigned(MCII, MI)
726 if (HexagonMCInstrInfo::isNewValue(MCII, MI) &&
727 &MO == &HexagonMCInstrInfo::getNewValueOperand(MCII, MI)) {
735 auto Instrs = HexagonMCInstrInfo::bundleInstructions(*State.Bundle);
741 if (HexagonMCInstrInfo::isImmext(Inst))
747 if (HexagonMCInstrInfo::isVector(MCII, Inst)) {
751 if (HexagonMCInstrInfo::hasNewValue(MCII, Inst))
752 DefReg1 = HexagonMCInstrInfo::getNewValueOperand(MCII, Inst).getReg();
753 if (HexagonMCInstrInfo::hasNewValue2(MCII, Inst))
754 DefReg2 = HexagonMCInstrInfo::getNewValueOperand2(MCII, Inst).getReg();
759 if (!HexagonMCInstrInfo::isPredicated(MCII, Inst)) {
763 assert(HexagonMCInstrInfo::isPredicated(MCII, MI) &&
765 if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) ==
766 HexagonMCInstrInfo::isPredicatedTrue(MCII, MI))
771 unsigned Offset = HexagonMCInstrInfo::isVector(MCII, MI) ? VOffset
774 Offset |= HexagonMCInstrInfo::SubregisterBit(UseReg, DefReg1, DefReg2);
781 if (HexagonMCInstrInfo::isSubInstruction(MI) ||
782 HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCJ)
783 return HexagonMCInstrInfo::getDuplexRegisterNumbering(Reg);