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  • only in /freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/

Lines Matching refs:Hexagon

1837 // Hexagon-specific code.
1905 return "Hexagon Constant Propagation";
1923 "Hexagon Constant Propagation", false, false)
1961 unsigned SubLo = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_lo);
1962 unsigned SubHi = HRI.getHexagonSubRegIndex(DefRC, Hexagon::ps_sub_hi);
1987 case Hexagon::A2_tfrsi:
1988 case Hexagon::A2_tfrpi:
1989 case Hexagon::CONST32:
1990 case Hexagon::CONST64:
2011 case Hexagon::PS_true:
2012 case Hexagon::PS_false:
2015 bool NonZero = (Opc == Hexagon::PS_true);
2023 case Hexagon::A2_and:
2024 case Hexagon::A2_andir:
2025 case Hexagon::A2_andp:
2026 case Hexagon::A2_or:
2027 case Hexagon::A2_orir:
2028 case Hexagon::A2_orp:
2029 case Hexagon::A2_xor:
2030 case Hexagon::A2_xorp:
2038 case Hexagon::A2_combineii: // combine(#s8Ext, #s8)
2039 case Hexagon::A4_combineii: // combine(#s8, #u6Ext)
2054 case Hexagon::S2_setbit_i:
2068 case Hexagon::C2_mux:
2069 case Hexagon::C2_muxir:
2070 case Hexagon::C2_muxri:
2071 case Hexagon::C2_muxii:
2079 case Hexagon::A2_sxtb:
2080 case Hexagon::A2_sxth:
2081 case Hexagon::A2_sxtw:
2082 case Hexagon::A2_zxtb:
2083 case Hexagon::A2_zxth:
2091 case Hexagon::S2_ct0:
2092 case Hexagon::S2_ct0p:
2093 case Hexagon::S2_ct1:
2094 case Hexagon::S2_ct1p:
2096 using namespace Hexagon;
2120 case Hexagon::S2_cl0:
2121 case Hexagon::S2_cl0p:
2122 case Hexagon::S2_cl1:
2123 case Hexagon::S2_cl1p:
2124 case Hexagon::S2_clb:
2125 case Hexagon::S2_clbp:
2127 using namespace Hexagon;
2152 case Hexagon::S4_extract:
2153 case Hexagon::S4_extractp:
2154 case Hexagon::S2_extractu:
2155 case Hexagon::S2_extractup:
2157 bool Signed = (Opc == Hexagon::S4_extract) ||
2158 (Opc == Hexagon::S4_extractp);
2183 case Hexagon::S2_vsplatrb:
2184 case Hexagon::S2_vsplatrh:
2217 if (RC != &Hexagon::DoubleRegsRegClass)
2219 if (R.SubReg != Hexagon::isub_lo && R.SubReg != Hexagon::isub_hi)
2235 if (R.SubReg == Hexagon::isub_hi) {
2253 if (R.SubReg == Hexagon::isub_hi)
2275 case Hexagon::J2_jumpf:
2276 case Hexagon::J2_jumpfnew:
2277 case Hexagon::J2_jumpfnewpt:
2280 case Hexagon::J2_jumpt:
2281 case Hexagon::J2_jumptnew:
2282 case Hexagon::J2_jumptnewpt:
2287 case Hexagon::J2_jump:
2343 case Hexagon::A2_tfrsi:
2344 case Hexagon::A2_tfrpi:
2345 case Hexagon::CONST32:
2346 case Hexagon::CONST64:
2347 case Hexagon::PS_true:
2348 case Hexagon::PS_false:
2369 if (Hexagon::IntRegsRegClass.hasSubClassEq(RC))
2371 if (Hexagon::DoubleRegsRegClass.hasSubClassEq(RC))
2373 if (Hexagon::PredRegsRegClass.hasSubClassEq(RC))
2381 case Hexagon::C2_cmpeq:
2382 case Hexagon::C2_cmpeqp:
2383 case Hexagon::A4_cmpbeq:
2384 case Hexagon::A4_cmpheq:
2385 case Hexagon::A4_cmpbeqi:
2386 case Hexagon::A4_cmpheqi:
2387 case Hexagon::C2_cmpeqi:
2388 case Hexagon::J4_cmpeqn1_t_jumpnv_nt:
2389 case Hexagon::J4_cmpeqn1_t_jumpnv_t:
2390 case Hexagon::J4_cmpeqi_t_jumpnv_nt:
2391 case Hexagon::J4_cmpeqi_t_jumpnv_t:
2392 case Hexagon::J4_cmpeq_t_jumpnv_nt:
2393 case Hexagon::J4_cmpeq_t_jumpnv_t:
2396 case Hexagon::C4_cmpneq:
2397 case Hexagon::C4_cmpneqi:
2398 case Hexagon::J4_cmpeqn1_f_jumpnv_nt:
2399 case Hexagon::J4_cmpeqn1_f_jumpnv_t:
2400 case Hexagon::J4_cmpeqi_f_jumpnv_nt:
2401 case Hexagon::J4_cmpeqi_f_jumpnv_t:
2402 case Hexagon::J4_cmpeq_f_jumpnv_nt:
2403 case Hexagon::J4_cmpeq_f_jumpnv_t:
2406 case Hexagon::C2_cmpgt:
2407 case Hexagon::C2_cmpgtp:
2408 case Hexagon::A4_cmpbgt:
2409 case Hexagon::A4_cmphgt:
2410 case Hexagon::A4_cmpbgti:
2411 case Hexagon::A4_cmphgti:
2412 case Hexagon::C2_cmpgti:
2413 case Hexagon::J4_cmpgtn1_t_jumpnv_nt:
2414 case Hexagon::J4_cmpgtn1_t_jumpnv_t:
2415 case Hexagon::J4_cmpgti_t_jumpnv_nt:
2416 case Hexagon::J4_cmpgti_t_jumpnv_t:
2417 case Hexagon::J4_cmpgt_t_jumpnv_nt:
2418 case Hexagon::J4_cmpgt_t_jumpnv_t:
2421 case Hexagon::C4_cmplte:
2422 case Hexagon::C4_cmpltei:
2423 case Hexagon::J4_cmpgtn1_f_jumpnv_nt:
2424 case Hexagon::J4_cmpgtn1_f_jumpnv_t:
2425 case Hexagon::J4_cmpgti_f_jumpnv_nt:
2426 case Hexagon::J4_cmpgti_f_jumpnv_t:
2427 case Hexagon::J4_cmpgt_f_jumpnv_nt:
2428 case Hexagon::J4_cmpgt_f_jumpnv_t:
2431 case Hexagon::C2_cmpgtu:
2432 case Hexagon::C2_cmpgtup:
2433 case Hexagon::A4_cmpbgtu:
2434 case Hexagon::A4_cmpbgtui:
2435 case Hexagon::A4_cmphgtu:
2436 case Hexagon::A4_cmphgtui:
2437 case Hexagon::C2_cmpgtui:
2438 case Hexagon::J4_cmpgtui_t_jumpnv_nt:
2439 case Hexagon::J4_cmpgtui_t_jumpnv_t:
2440 case Hexagon::J4_cmpgtu_t_jumpnv_nt:
2441 case Hexagon::J4_cmpgtu_t_jumpnv_t:
2444 case Hexagon::J4_cmpltu_f_jumpnv_nt:
2445 case Hexagon::J4_cmpltu_f_jumpnv_t:
2448 case Hexagon::J4_cmpltu_t_jumpnv_nt:
2449 case Hexagon::J4_cmpltu_t_jumpnv_t:
2452 case Hexagon::J4_cmplt_f_jumpnv_nt:
2453 case Hexagon::J4_cmplt_f_jumpnv_t:
2456 case Hexagon::C4_cmplteu:
2457 case Hexagon::C4_cmplteui:
2458 case Hexagon::J4_cmpgtui_f_jumpnv_nt:
2459 case Hexagon::J4_cmpgtui_f_jumpnv_t:
2460 case Hexagon::J4_cmpgtu_f_jumpnv_nt:
2461 case Hexagon::J4_cmpgtu_f_jumpnv_t:
2464 case Hexagon::J4_cmplt_t_jumpnv_nt:
2465 case Hexagon::J4_cmplt_t_jumpnv_t:
2478 case Hexagon::A4_cmpbgtui: // u7
2479 case Hexagon::A4_cmphgtui: // u7
2481 case Hexagon::A4_cmpheqi: // s8
2482 case Hexagon::C4_cmpneqi: // s8
2485 case Hexagon::A4_cmpbeqi: // u8
2487 case Hexagon::C2_cmpgtui: // u9
2488 case Hexagon::C4_cmplteui: // u9
2490 case Hexagon::C2_cmpeqi: // s10
2491 case Hexagon::C2_cmpgti: // s10
2492 case Hexagon::C4_cmpltei: // s10
2495 case Hexagon::J4_cmpeqi_f_jumpnv_nt: // u5
2496 case Hexagon::J4_cmpeqi_f_jumpnv_t: // u5
2497 case Hexagon::J4_cmpeqi_t_jumpnv_nt: // u5
2498 case Hexagon::J4_cmpeqi_t_jumpnv_t: // u5
2499 case Hexagon::J4_cmpgti_f_jumpnv_nt: // u5
2500 case Hexagon::J4_cmpgti_f_jumpnv_t: // u5
2501 case Hexagon::J4_cmpgti_t_jumpnv_nt: // u5
2502 case Hexagon::J4_cmpgti_t_jumpnv_t: // u5
2503 case Hexagon::J4_cmpgtui_f_jumpnv_nt: // u5
2504 case Hexagon::J4_cmpgtui_f_jumpnv_t: // u5
2505 case Hexagon::J4_cmpgtui_t_jumpnv_nt: // u5
2506 case Hexagon::J4_cmpgtui_t_jumpnv_t: // u5
2518 MI.setDesc(HII.get(Hexagon::A2_nop));
2565 case Hexagon::C2_cmpeq:
2566 case Hexagon::C2_cmpeqp:
2567 case Hexagon::C2_cmpgt:
2568 case Hexagon::C2_cmpgtp:
2569 case Hexagon::C2_cmpgtu:
2570 case Hexagon::C2_cmpgtup:
2571 case Hexagon::C2_cmpeqi:
2572 case Hexagon::C2_cmpgti:
2573 case Hexagon::C2_cmpgtui:
2648 case Hexagon::A2_and:
2649 case Hexagon::A2_andp:
2652 case Hexagon::A2_andir: {
2659 case Hexagon::A2_or:
2660 case Hexagon::A2_orp:
2663 case Hexagon::A2_orir: {
2670 case Hexagon::A2_xor:
2671 case Hexagon::A2_xorp:
2734 case Hexagon::A2_sxtb:
2735 case Hexagon::A2_zxtb:
2738 case Hexagon::A2_sxth:
2739 case Hexagon::A2_zxth:
2742 case Hexagon::A2_sxtw:
2751 case Hexagon::A2_sxtb:
2752 case Hexagon::A2_sxth:
2753 case Hexagon::A2_sxtw:
2780 case Hexagon::S2_vsplatrb:
2784 case Hexagon::S2_vsplatrh:
2887 const TargetRegisterClass *PredRC = &Hexagon::PredRegsRegClass;
2891 &HII.get(Hexagon::PS_false) :
2892 &HII.get(Hexagon::PS_true);
2912 NewRC = &Hexagon::IntRegsRegClass;
2914 NewRC = &Hexagon::DoubleRegsRegClass;
2919 NewD = &HII.get(Hexagon::A2_tfrsi);
2924 NewD = &HII.get(Hexagon::A2_tfrpi);
2931 NewD = &HII.get(Hexagon::A2_combineii);
2937 NewD = &HII.get(Hexagon::CONST64);
2977 case Hexagon::M2_maci:
3028 const MCInstrDesc &D = (V >= 0) ? HII.get(Hexagon::M2_macsip)
3029 : HII.get(Hexagon::M2_macsin);
3044 case Hexagon::A2_and:
3080 case Hexagon::A2_or:
3157 if (BrI.getOpcode() == Hexagon::J2_jump)
3172 const MCInstrDesc &JD = HII.get(Hexagon::J2_jump);