Lines Matching defs:isAdd
598 bool isAdd = true;
603 isAdd = false;
609 isAdd = false;
613 return isAdd;
979 bool isAdd = true;
988 isAdd = false ; // 'U' bit is set as part of the fixup.
1003 isAdd = false;
1006 isAdd = false;
1011 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm12, Fixups, STI);
1015 if (isAdd)
1036 bool isAdd = Imm >= 0;
1046 if (isAdd)
1085 bool isAdd = Imm >= 0;
1089 if (!isAdd)
1094 if (isAdd)
1112 bool isAdd = true;
1118 isAdd = false ; // 'U' bit is set as part of the fixup.
1127 isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm8, Fixups, STI);
1137 if (isAdd)
1154 bool isAdd = EncodeAddrModeOpValues(MI, OpIdx, Reg, Imm7, Fixups, STI);
1164 if (isAdd)
1251 bool isAdd = ARM_AM::getAM2Op(MO2.getImm()) == ARM_AM::add;
1260 // {12} = isAdd
1270 if (isAdd)
1280 // {12} isAdd
1285 bool isAdd = ARM_AM::getAM2Op(Imm) == ARM_AM::add;
1295 return Binary | (isAdd << 12) | (isReg << 13);
1302 // {4} isAdd
1306 bool isAdd = MO1.getImm() != 0;
1307 return CTX.getRegisterInfo()->getEncodingValue(MO.getReg()) | (isAdd << 4);
1315 // {8} isAdd
1321 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1327 return Imm8 | (isAdd << 8) | (isImm << 9);
1336 // {8} isAdd
1357 bool isAdd = ARM_AM::getAM3Op(Imm) == ARM_AM::add;
1363 return (Rn << 9) | Imm8 | (isAdd << 8) | (isImm << 13);
1417 bool isAdd;
1423 isAdd = false; // 'U' bit is handled as part of the fixup.
1437 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1442 if (isAdd)
1457 bool isAdd;
1463 isAdd = false; // 'U' bit is handled as part of the fixup.
1477 isAdd = ARM_AM::getAM5Op(Imm8) == ARM_AM::add;
1482 if (isAdd)