Lines Matching refs:RegNum
826 unsigned RegNum;
831 unsigned RegNum;
860 unsigned RegNum;
966 return Reg.RegNum;
1443 ARMMCRegisterClasses[ARM::GPRRegClassID].contains(PostIdxReg.RegNum);
1964 VectorList.RegNum);
1970 .contains(VectorList.RegNum));
1987 .contains(VectorList.RegNum));
2003 VectorList.RegNum);
2022 .contains(VectorList.RegNum));
2411 unsigned RegNum = getCondCode() == ARMCC::AL ? 0: ARM::CPSR;
2412 Inst.addOperand(MCOperand::createReg(RegNum));
2418 unsigned RegNum = getVPTPred() == ARMVCC::None ? 0: ARM::P0;
2419 Inst.addOperand(MCOperand::createReg(RegNum));
2425 unsigned RegNum;
2427 RegNum = 0;
2434 RegNum = Inst.getOperand(TiedOp).getReg();
2436 Inst.addOperand(MCOperand::createReg(RegNum));
2941 Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum));
3181 Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum));
3187 Inst.addOperand(MCOperand::createReg(PostIdxReg.RegNum));
3219 Inst.addOperand(MCOperand::createReg(VectorList.RegNum));
3246 if (RC_in->getRegister(I) == VectorList.RegNum)
3255 Inst.addOperand(MCOperand::createReg(VectorList.RegNum));
3499 static std::unique_ptr<ARMOperand> CreateCCOut(unsigned RegNum, SMLoc S) {
3501 Op->Reg.RegNum = RegNum;
3516 static std::unique_ptr<ARMOperand> CreateReg(unsigned RegNum, SMLoc S,
3519 Op->Reg.RegNum = RegNum;
3633 static std::unique_ptr<ARMOperand> CreateVectorList(unsigned RegNum,
3638 Op->VectorList.RegNum = RegNum;
3647 CreateVectorListAllLanes(unsigned RegNum, unsigned Count, bool isDoubleSpaced,
3650 Op->VectorList.RegNum = RegNum;
3659 CreateVectorListIndexed(unsigned RegNum, unsigned Count, unsigned Index,
3662 Op->VectorList.RegNum = RegNum;
3709 CreatePostIdxReg(unsigned RegNum, bool isAdd, ARM_AM::ShiftOpc ShiftTy,
3712 Op->PostIdxReg.RegNum = RegNum;
3851 << RegName(PostIdxReg.RegNum);
3917 << RegName(VectorList.RegNum) << ">";
3921 << RegName(VectorList.RegNum) << ">";
3925 << VectorList.Count << " * " << RegName(VectorList.RegNum) << ">";
3970 unsigned RegNum = MatchRegisterName(lowerCase);
3971 if (!RegNum) {
3972 RegNum = StringSwitch<unsigned>(lowerCase)
3995 if (!RegNum) {
4008 if (!hasD32() && RegNum >= ARM::D16 && RegNum <= ARM::D31)
4013 return RegNum;