Lines Matching refs:Op5
6528 auto &Op5 = static_cast<ARMOperand &>(*Operands[5]);
6533 (Op5.isReg() && Op5.getReg() == ARM::PC);
6536 (Op5.isReg() && Op5.getReg() == ARM::SP)) &&
6538 Op5.isImm() && !Op5.isImm0_508s4());
6557 // Op4 and Op5. The 'ADD Rdm, SP, Rdm' form is already handled specially
6559 const ARMOperand *LastOp = &Op5;
6561 if (!Transform && Op5.isReg() && Op3Reg == Op5.getReg() &&
6587 std::swap(Op4, Op5);