Lines Matching refs:MCInst
1 //===- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions -------===//
32 #include "llvm/MC/MCInst.h"
294 SmallVector<MCInst, 4> PendingConditionalInsts;
303 MCInst ITInst;
311 for (const MCInst &Inst : PendingConditionalInsts) {
448 bool validatetLDMRegList(const MCInst &Inst, const OperandVector &Operands,
450 bool validatetSTMRegList(const MCInst &Inst, const OperandVector &Operands,
643 void cvtThumbMultiply(MCInst &Inst, const OperandVector &);
644 void cvtThumbBranches(MCInst &Inst, const OperandVector &);
645 void cvtMVEVMOVQtoDReg(MCInst &Inst, const OperandVector &);
647 bool validateInstruction(MCInst &Inst, const OperandVector &Ops);
648 bool processInstruction(MCInst &Inst, const OperandVector &Ops, MCStreamer &Out);
652 bool isITBlockTerminator(MCInst &Inst) const;
654 bool validateLDRDSTRD(MCInst &Inst, const OperandVector &Operands,
703 unsigned checkTargetMatchPredicate(MCInst &Inst) override;
709 unsigned MatchInstruction(OperandVector &Operands, MCInst &Inst,
2388 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
2398 void addARMBranchTargetOperands(MCInst &Inst, unsigned N) const {
2403 void addThumbBranchTargetOperands(MCInst &Inst, unsigned N) const {
2408 void addCondCodeOperands(MCInst &Inst, unsigned N) const {
2415 void addVPTPredNOperands(MCInst &Inst, unsigned N) const {
2422 void addVPTPredROperands(MCInst &Inst, unsigned N) const {
2439 void addCoprocNumOperands(MCInst &Inst, unsigned N) const {
2444 void addCoprocRegOperands(MCInst &Inst, unsigned N) const {
2449 void addCoprocOptionOperands(MCInst &Inst, unsigned N) const {
2454 void addITMaskOperands(MCInst &Inst, unsigned N) const {
2459 void addITCondCodeOperands(MCInst &Inst, unsigned N) const {
2464 void addITCondCodeInvOperands(MCInst &Inst, unsigned N) const {
2469 void addCCOutOperands(MCInst &Inst, unsigned N) const {
2474 void addRegOperands(MCInst &Inst, unsigned N) const {
2479 void addRegShiftedRegOperands(MCInst &Inst, unsigned N) const {
2489 void addRegShiftedImmOperands(MCInst &Inst, unsigned N) const {
2500 void addShifterImmOperands(MCInst &Inst, unsigned N) const {
2506 void addRegListOperands(MCInst &Inst, unsigned N) const {
2514 void addRegListWithAPSROperands(MCInst &Inst, unsigned N) const {
2522 void addDPRRegListOperands(MCInst &Inst, unsigned N) const {
2526 void addSPRRegListOperands(MCInst &Inst, unsigned N) const {
2530 void addFPSRegListWithVPROperands(MCInst &Inst, unsigned N) const {
2534 void addFPDRegListWithVPROperands(MCInst &Inst, unsigned N) const {
2538 void addRotImmOperands(MCInst &Inst, unsigned N) const {
2544 void addModImmOperands(MCInst &Inst, unsigned N) const {
2554 void addModImmNotOperands(MCInst &Inst, unsigned N) const {
2561 void addModImmNegOperands(MCInst &Inst, unsigned N) const {
2568 void addThumbModImmNeg8_255Operands(MCInst &Inst, unsigned N) const {
2575 void addThumbModImmNeg1_7Operands(MCInst &Inst, unsigned N) const {
2582 void addBitfieldOperands(MCInst &Inst, unsigned N) const {
2593 void addImmOperands(MCInst &Inst, unsigned N) const {
2598 void addFBits16Operands(MCInst &Inst, unsigned N) const {
2604 void addFBits32Operands(MCInst &Inst, unsigned N) const {
2610 void addFPImmOperands(MCInst &Inst, unsigned N) const {
2617 void addImm8s4Operands(MCInst &Inst, unsigned N) const {
2625 void addImm7s4Operands(MCInst &Inst, unsigned N) const {
2633 void addImm7Shift0Operands(MCInst &Inst, unsigned N) const {
2639 void addImm7Shift1Operands(MCInst &Inst, unsigned N) const {
2645 void addImm7Shift2Operands(MCInst &Inst, unsigned N) const {
2651 void addImm7Operands(MCInst &Inst, unsigned N) const {
2657 void addImm0_1020s4Operands(MCInst &Inst, unsigned N) const {
2660 // in the MCInst as such. Lop off the low two bits here.
2665 void addImm0_508s4NegOperands(MCInst &Inst, unsigned N) const {
2668 // in the MCInst as such. Lop off the low two bits here.
2673 void addImm0_508s4Operands(MCInst &Inst, unsigned N) const {
2676 // in the MCInst as such. Lop off the low two bits here.
2681 void addImm1_16Operands(MCInst &Inst, unsigned N) const {
2689 void addImm1_32Operands(MCInst &Inst, unsigned N) const {
2697 void addImmThumbSROperands(MCInst &Inst, unsigned N) const {
2706 void addPKHASRImmOperands(MCInst &Inst, unsigned N) const {
2715 void addT2SOImmNotOperands(MCInst &Inst, unsigned N) const {
2723 void addT2SOImmNegOperands(MCInst &Inst, unsigned N) const {
2731 void addImm0_4095NegOperands(MCInst &Inst, unsigned N) const {
2739 void addUnsignedOffset_b8s2Operands(MCInst &Inst, unsigned N) const {
2748 void addThumbMemPCOperands(MCInst &Inst, unsigned N) const {
2766 void addMemBarrierOptOperands(MCInst &Inst, unsigned N) const {
2771 void addInstSyncBarrierOptOperands(MCInst &Inst, unsigned N) const {
2776 void addTraceSyncBarrierOptOperands(MCInst &Inst, unsigned N) const {
2781 void addMemNoOffsetOperands(MCInst &Inst, unsigned N) const {
2786 void addMemNoOffsetT2Operands(MCInst &Inst, unsigned N) const {
2791 void addMemNoOffsetT2NoSpOperands(MCInst &Inst, unsigned N) const {
2796 void addMemNoOffsetTOperands(MCInst &Inst, unsigned N) const {
2801 void addMemPCRelImm12Operands(MCInst &Inst, unsigned N) const {
2807 void addAdrLabelOperands(MCInst &Inst, unsigned N) const {
2823 void addAlignedMemoryOperands(MCInst &Inst, unsigned N) const {
2829 void addDupAlignedMemoryNoneOperands(MCInst &Inst, unsigned N) const {
2833 void addAlignedMemoryNoneOperands(MCInst &Inst, unsigned N) const {
2837 void addAlignedMemory16Operands(MCInst &Inst, unsigned N) const {
2841 void addDupAlignedMemory16Operands(MCInst &Inst, unsigned N) const {
2845 void addAlignedMemory32Operands(MCInst &Inst, unsigned N) const {
2849 void addDupAlignedMemory32Operands(MCInst &Inst, unsigned N) const {
2853 void addAlignedMemory64Operands(MCInst &Inst, unsigned N) const {
2857 void addDupAlignedMemory64Operands(MCInst &Inst, unsigned N) const {
2861 void addAlignedMemory64or128Operands(MCInst &Inst, unsigned N) const {
2865 void addDupAlignedMemory64or128Operands(MCInst &Inst, unsigned N) const {
2869 void addAlignedMemory64or128or256Operands(MCInst &Inst, unsigned N) const {
2873 void addAddrMode2Operands(MCInst &Inst, unsigned N) const {
2893 void addAM2OffsetImmOperands(MCInst &Inst, unsigned N) const {
2907 void addAddrMode3Operands(MCInst &Inst, unsigned N) const {
2936 void addAM3OffsetOperands(MCInst &Inst, unsigned N) const {
2958 void addAddrMode5Operands(MCInst &Inst, unsigned N) const {
2980 void addAddrMode5FP16Operands(MCInst &Inst, unsigned N) const {
3002 void addMemImm8s4OffsetOperands(MCInst &Inst, unsigned N) const {
3018 void addMemImm7s4OffsetOperands(MCInst &Inst, unsigned N) const {
3034 void addMemImm0_1020s4OffsetOperands(MCInst &Inst, unsigned N) const {
3042 void addMemImmOffsetOperands(MCInst &Inst, unsigned N) const {
3049 void addMemRegRQOffsetOperands(MCInst &Inst, unsigned N) const {
3055 void addMemUImm12OffsetOperands(MCInst &Inst, unsigned N) const {
3070 void addMemImm12OffsetOperands(MCInst &Inst, unsigned N) const {
3085 void addConstPoolAsmImmOperands(MCInst &Inst, unsigned N) const {
3093 void addMemTBBOperands(MCInst &Inst, unsigned N) const {
3099 void addMemTBHOperands(MCInst &Inst, unsigned N) const {
3105 void addMemRegOffsetOperands(MCInst &Inst, unsigned N) const {
3115 void addT2MemRegOffsetOperands(MCInst &Inst, unsigned N) const {
3122 void addMemThumbRROperands(MCInst &Inst, unsigned N) const {
3128 void addMemThumbRIs4Operands(MCInst &Inst, unsigned N) const {
3135 void addMemThumbRIs2Operands(MCInst &Inst, unsigned N) const {
3142 void addMemThumbRIs1Operands(MCInst &Inst, unsigned N) const {
3149 void addMemThumbSPIOperands(MCInst &Inst, unsigned N) const {
3156 void addPostIdxImm8Operands(MCInst &Inst, unsigned N) const {
3167 void addPostIdxImm8s4Operands(MCInst &Inst, unsigned N) const {
3179 void addPostIdxRegOperands(MCInst &Inst, unsigned N) const {
3185 void addPostIdxRegShiftedOperands(MCInst &Inst, unsigned N) const {
3196 void addPowerTwoOperands(MCInst &Inst, unsigned N) const {
3202 void addMSRMaskOperands(MCInst &Inst, unsigned N) const {
3207 void addBankedRegOperands(MCInst &Inst, unsigned N) const {
3212 void addProcIFlagsOperands(MCInst &Inst, unsigned N) const {
3217 void addVecListOperands(MCInst &Inst, unsigned N) const {
3222 void addMVEVecListOperands(MCInst &Inst, unsigned N) const {
3253 void addVecListIndexedOperands(MCInst &Inst, unsigned N) const {
3259 void addVectorIndex8Operands(MCInst &Inst, unsigned N) const {
3264 void addVectorIndex16Operands(MCInst &Inst, unsigned N) const {
3269 void addVectorIndex32Operands(MCInst &Inst, unsigned N) const {
3274 void addVectorIndex64Operands(MCInst &Inst, unsigned N) const {
3279 void addMVEVectorIndexOperands(MCInst &Inst, unsigned N) const {
3284 void addMVEPairVectorIndexOperands(MCInst &Inst, unsigned N) const {
3289 void addNEONi8splatOperands(MCInst &Inst, unsigned N) const {
3297 void addNEONi16splatOperands(MCInst &Inst, unsigned N) const {
3306 void addNEONi16splatNotOperands(MCInst &Inst, unsigned N) const {
3315 void addNEONi32splatOperands(MCInst &Inst, unsigned N) const {
3324 void addNEONi32splatNotOperands(MCInst &Inst, unsigned N) const {
3333 void addNEONi8ReplicateOperands(MCInst &Inst, bool Inv) const {
3348 void addNEONinvi8ReplicateOperands(MCInst &Inst, unsigned N) const {
3363 void addNEONi32vmovOperands(MCInst &Inst, unsigned N) const {
3371 void addNEONvmovi8ReplicateOperands(MCInst &Inst, unsigned N) const {
3376 void addNEONvmovi16ReplicateOperands(MCInst &Inst, unsigned N) const {
3392 void addNEONi32vmovNegOperands(MCInst &Inst, unsigned N) const {
3400 void addNEONvmovi32ReplicateOperands(MCInst &Inst, unsigned N) const {
3414 void addNEONi64splatOperands(MCInst &Inst, unsigned N) const {
3426 void addComplexRotationEvenOperands(MCInst &Inst, unsigned N) const {
3432 void addComplexRotationOddOperands(MCInst &Inst, unsigned N) const {
3438 void addMveSaturateOperands(MCInst &Inst, unsigned N) const {
5621 /// Convert parsed operands to MCInst. Needed here because this instruction
5624 void ARMAsmParser::cvtThumbMultiply(MCInst &Inst,
5640 void ARMAsmParser::cvtThumbBranches(MCInst &Inst,
5699 MCInst &Inst, const OperandVector &Operands) {
7351 static bool checkLowRegisterList(const MCInst &Inst, unsigned OpNo,
7368 static bool listContainsReg(const MCInst &Inst, unsigned OpNo, unsigned Reg) {
7379 static bool instIsBreakpoint(const MCInst &Inst) {
7386 bool ARMAsmParser::validatetLDMRegList(const MCInst &Inst,
7405 bool ARMAsmParser::validatetSTMRegList(const MCInst &Inst,
7426 bool ARMAsmParser::validateLDRDSTRD(MCInst &Inst,
7497 bool ARMAsmParser::validateInstruction(MCInst &Inst,
8522 bool ARMAsmParser::processInstruction(MCInst &Inst,
8543 MCInst TmpInst;
8559 MCInst TmpInst;
8581 MCInst TmpInst;
8599 MCInst TmpInst;
8658 MCInst TmpInst;
8742 MCInst TmpInst;
8764 MCInst TmpInst;
8788 MCInst TmpInst;
8814 MCInst TmpInst;
8840 MCInst TmpInst;
8862 MCInst TmpInst;
8886 MCInst TmpInst;
8912 MCInst TmpInst;
8938 MCInst TmpInst;
8958 MCInst TmpInst;
8980 MCInst TmpInst;
9004 MCInst TmpInst;
9029 MCInst TmpInst;
9052 MCInst TmpInst;
9079 MCInst TmpInst;
9110 MCInst TmpInst;
9143 MCInst TmpInst;
9166 MCInst TmpInst;
9193 MCInst TmpInst;
9224 MCInst TmpInst;
9257 MCInst TmpInst;
9278 MCInst TmpInst;
9303 MCInst TmpInst;
9332 MCInst TmpInst;
9367 MCInst TmpInst;
9389 MCInst TmpInst;
9413 MCInst TmpInst;
9438 MCInst TmpInst;
9460 MCInst TmpInst;
9484 MCInst TmpInst;
9509 MCInst TmpInst;
9533 MCInst TmpInst;
9559 MCInst TmpInst;
9586 MCInst TmpInst;
9610 MCInst TmpInst;
9636 MCInst TmpInst;
9663 MCInst TmpInst;
9685 MCInst TmpInst;
9709 MCInst TmpInst;
9734 MCInst TmpInst;
9758 MCInst TmpInst;
9784 MCInst TmpInst;
9820 MCInst TmpInst;
9847 MCInst TmpInst;
9882 MCInst TmpInst;
9939 MCInst TmpInst;
9970 MCInst TmpInst;
9984 MCInst TmpInst;
10000 MCInst TmpInst;
10016 MCInst TmpInst;
10032 MCInst TmpInst;
10050 MCInst TmpInst;
10122 MCInst TmpInst;
10142 MCInst TmpInst;
10170 MCInst TmpInst;
10290 MCInst TmpInst;
10311 MCInst TmpInst;
10341 MCInst TmpInst;
10359 MCInst TmpInst;
10393 MCInst TmpInst;
10437 MCInst TmpInst;
10471 MCInst TmpInst;
10521 unsigned ARMAsmParser::checkTargetMatchPredicate(MCInst &Inst) {
10633 template <> inline bool IsCPSRDead<MCInst>(const MCInst *Instr) {
10641 bool ARMAsmParser::isITBlockTerminator(MCInst &Inst) const {
10658 unsigned ARMAsmParser::MatchInstruction(OperandVector &Operands, MCInst &Inst,
10751 MCInst Inst;