Lines Matching refs:Imm
868 unsigned Imm;
885 unsigned Imm;
914 struct ImmOp Imm;
980 return Imm.Val;
985 return Imm.Val;
1057 if (isa<MCSymbolRefExpr>(Imm.Val)) return true;
1058 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val)) {
1072 if (isa<MCSymbolRefExpr>(Imm.Val)) return true;
1073 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val)) {
1087 if (isa<MCSymbolRefExpr>(Imm.Val)) return true;
1088 if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val)) {
1102 if (isa<MCSymbolRefExpr>(Imm.Val)) return true;
1103 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Imm.Val);
2495 unsigned Imm = (RegShiftedImm.ShiftImm == 32 ? 0 : RegShiftedImm.ShiftImm);
2497 ARM_AM::getSORegOpc(RegShiftedImm.ShiftTy, Imm)));
2503 ShifterImm.Imm));
2541 Inst.addOperand(MCOperand::createImm(RotImm.Imm >> 3));
2702 unsigned Imm = CE->getValue();
2703 Inst.addOperand(MCOperand::createImm((Imm == 32 ? 0 : Imm)));
2744 const MCSymbolRefExpr *SR = cast<MCSymbolRefExpr>(Imm.Val);
2756 const MCSymbolRefExpr *SR = cast<MCSymbolRefExpr>(Imm.Val);
2803 int32_t Imm = Memory.OffsetImm->getValue();
2804 Inst.addOperand(MCOperand::createImm(Imm));
3160 int Imm = CE->getValue();
3161 bool isAdd = Imm >= 0;
3162 if (Imm == std::numeric_limits<int32_t>::min()) Imm = 0;
3163 Imm = (Imm < 0 ? -Imm : Imm) | (int)isAdd << 8;
3164 Inst.addOperand(MCOperand::createImm(Imm));
3171 int Imm = CE->getValue();
3172 bool isAdd = Imm >= 0;
3173 if (Imm == std::numeric_limits<int32_t>::min()) Imm = 0;
3175 Imm = ((Imm < 0 ? -Imm : Imm) / 4) | (int)isAdd << 8;
3176 Inst.addOperand(MCOperand::createImm(Imm));
3191 unsigned Imm = ARM_AM::getAM2Opc(opc, PostIdxReg.ShiftImm,
3193 Inst.addOperand(MCOperand::createImm(Imm));
3419 unsigned Imm = 0;
3421 Imm |= (Value & 1) << i;
3423 Inst.addOperand(MCOperand::createImm(Imm | 0x1e00));
3441 unsigned Imm = CE->getValue();
3442 assert((Imm == 48 || Imm == 64) && "Invalid saturate operand");
3443 Inst.addOperand(MCOperand::createImm(Imm == 48 ? 1 : 0));
3551 static std::unique_ptr<ARMOperand> CreateShifterImm(bool isASR, unsigned Imm,
3555 Op->ShifterImm.Imm = Imm;
3561 static std::unique_ptr<ARMOperand> CreateRotImm(unsigned Imm, SMLoc S,
3564 Op->RotImm.Imm = Imm;
3583 Op->Imm.Val = Val;
3683 Op->Imm.Val = Val;
3871 << " #" << ShifterImm.Imm << ">";
3884 OS << "<ror " << " #" << (RotImm.Imm * 8) << ">";
4053 int64_t Imm = 0;
4080 Imm = CE->getValue();
4081 if (Imm < 0 ||
4082 ((ShiftTy == ARM_AM::lsl || ShiftTy == ARM_AM::ror) && Imm > 31) ||
4083 ((ShiftTy == ARM_AM::lsr || ShiftTy == ARM_AM::asr) && Imm > 32)) {
4089 if (Imm == 0)
4108 ShiftReg, Imm,
4111 Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm,
5955 int64_t Imm = CE->getValue();
5956 if (Imm < 0 ||
5957 ((St == ARM_AM::lsl || St == ARM_AM::ror) && Imm > 31) ||
5958 ((St == ARM_AM::lsr || St == ARM_AM::asr) && Imm > 32))
5961 if (Imm == 0)
5964 if (Imm == 32)
5965 Imm = 0;
5966 Amount = Imm;