Lines Matching refs:v8i8
215 {ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 0},
216 {ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 0},
252 {ISD::TRUNCATE, MVT::v8i16, MVT::v8i8, 0},
282 { ISD::ADD, MVT::v8i16, MVT::v8i8, 0 },
285 { ISD::SUB, MVT::v8i16, MVT::v8i8, 0 },
288 { ISD::MUL, MVT::v8i16, MVT::v8i8, 0 },
291 { ISD::SHL, MVT::v8i16, MVT::v8i8, 0 },
332 { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
333 { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
342 { ISD::SIGN_EXTEND, MVT::v8i32, MVT::v8i8, 3 },
343 { ISD::ZERO_EXTEND, MVT::v8i32, MVT::v8i8, 3 },
344 { ISD::SIGN_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
345 { ISD::ZERO_EXTEND, MVT::v8i64, MVT::v8i8, 7 },
353 { ISD::TRUNCATE, MVT::v8i8, MVT::v8i32, 3 },
478 { ISD::SIGN_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
479 { ISD::ZERO_EXTEND, MVT::v8i16, MVT::v8i8, 1 },
744 {ISD::VECTOR_SHUFFLE, MVT::v8i8, 1},
766 {ISD::VECTOR_SHUFFLE, MVT::v8i8, 1},
864 { ISD::SDIV, MVT::v8i8, ReciprocalDivCost},
865 { ISD::UDIV, MVT::v8i8, ReciprocalDivCost},
866 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost},
867 { ISD::UREM, MVT::v8i8, 8 * FunctionCallDivCost},
1031 // true for v4i8, v8i8 and v4i16 at least (but not for v4f16 as it is