Lines Matching refs:v4i32
211 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 0},
212 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 0},
213 {ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 0},
214 {ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 0},
250 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i16, 0},
251 {ISD::TRUNCATE, MVT::v4i32, MVT::v4i8, 0},
281 { ISD::ADD, MVT::v4i32, MVT::v4i16, 0 },
284 { ISD::SUB, MVT::v4i32, MVT::v4i16, 0 },
287 { ISD::MUL, MVT::v4i32, MVT::v4i16, 0 },
290 { ISD::SHL, MVT::v4i32, MVT::v4i16, 0 },
324 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
325 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
328 { ISD::TRUNCATE, MVT::v4i32, MVT::v4i64, 0 },
329 { ISD::TRUNCATE, MVT::v4i16, MVT::v4i32, 1 },
334 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
335 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
356 { ISD::SINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
357 { ISD::UINT_TO_FP, MVT::v4f32, MVT::v4i32, 1 },
380 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 },
381 { ISD::FP_TO_UINT, MVT::v4i32, MVT::v4f32, 1 },
480 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
481 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i8, 2 },
484 { ISD::SIGN_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
485 { ISD::ZERO_EXTEND, MVT::v4i32, MVT::v4i16, 1 },
746 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1},
768 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
790 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 2},
808 {ISD::VECTOR_SHUFFLE, MVT::v4i32, 1},
873 { ISD::SDIV, MVT::v4i32, 4 * FunctionCallDivCost},
874 { ISD::UDIV, MVT::v4i32, 4 * FunctionCallDivCost},
875 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost},
876 { ISD::UREM, MVT::v4i32, 4 * FunctionCallDivCost},